May • June 2016; Volume 20, Number 3
A plasma etch module that provides high-rate, low non-uniformity Si via reveal etch is
important to one of the final and critical steps in the 3D wafer stacking process flow
(see cover article on p.45). Combining a high-throughput Si thinning process with high
selectivity to the oxide liners delivers the smooth wafer surface needed for the subsequent steps to complete the 3D process flow.
Photo courtesy of SPTS Technologies
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Tokyo, Japan and St. Petersburg, FL - May 31, 2016 — DISCO Corporation, the world's largest dicing equipment provider, has signed a global distribution agreement with Plasma-Therm for its plasma dicing technology, the companies announced on May 31, 2016
Piscataway, NJ – May 24, 2016 – The IEEE Components, Packaging and Manufacturing Technology Society (CPMT) will recognize its 2016 award winners at the 66th Electronic Components
San Jose, CA - May 18, 2016 - VLSI announces 10 BEST semiconductor equipment supplier rankings for 2016.
19 of the 20 10 BEST suppliers have achieved greater than an 8.0 rating this year. ...>>
San Jose, CA - April 18th, 2016 – Invensas Corporation, a wholly owned subsidiary of Tessera Technologies, Inc. (Nasdaq: TSRA), announced today that Sandia National Laboratories signed a new license agreement for ZiBond® and Direct Bond Interconnect (DBI®) technologies. With this license Sandia will have access to the most advanced 3D integration technologies available, for use in a wide range of semiconductor applications.
1932-2016 Gene Selven
Publisher, Chip Scale Review 1999-2008
San Jose, California ─ April 2, 2016 ─ Those who were fortunate to have known Gene Selven recall a passionate, remarkable person in both business and leisure. His presence would fill a room—there was no escaping it. He was also passionate in everything he did.
Las Vegas, NV, - May 31 - June 3, 2016 - The IEEE’s 66th Electronic Components and Technology Conference (ECTC) will be held at The Cosmopolitan of Las Vegas, Las Vegas, Nevada. This premier international annual conference, sponsored by the IEEE Components, Packaging and Manufacturing Technology (CPMT) Society, brings together key stakeholders of the global microelectronic packaging industry, such as semiconductor companies, foundry and OSAT service providers, equipment manufacturers, material suppliers, research institutions and universities, all under one roof.
San Jose, CA – April 7, 2016 – MEPTEC is pleased to announce that speakers have been announced for the 14th Annual MEMS Technology Symposium. The event will be held May 11 at the Holiday Inn in San Jose, California – USA. ...>>
Minneapolis, MN - March 31, 2016 - The SMTA and Chip Scale Review magazine are pleased to announce the Keynote Presenters for the 13th Annual International Wafer-Level Packaging Conference. The IWLPC will be held October 18-20, 2016 at the DoubleTree Airport Hotel in San Jose, California - USA ...>>
Mesa, Arizona - March 6-9, 2016 - At BiTS 2016 we will be examining the test challenges of the Internet of Things (IoT) including the Internet of Vehicles (IoV) and those of Big Data. This is a very rich program - eight presentation sessions, poster session, Keynote Address, and Distinguished Speaker plus an excellent Tutorial spanning four days.