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January • February; Volume 24, Number 1

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Wafer geometry is vital for process control at the front end of line, and ultimately, device yield. Additionally, as wafer thinning becomes ever more critical at the far back end of line, so too, is being able to quickly measure wafer geometry (e.g., nanotopography, roughness) on the entire wafer. Not only has wavefront phase imaging been shown to be a good candidate for FEOL and FBEOL applications, it is also showing promise for global wafer geometry measurements on patterned wafers during BEOL processes.

 

Photo courtesy of iStock/Norman Cooper


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White Paper: System-level, post-layout electrical analysis for high-density advanced packaging
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Mentor, a Siemens Business

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