Steve Berry and Sandra Winkler Contributing Editors

Flip chip is a method of interconnecting die to an interposer or directly to a PWB. As the name implies, the die is flipped face down (or active side down) so that the circuitry faces the substrate. The electrical connection is achieved through bumps on the face of the die.

Flip chip delivers a higher level of speed with reduced parasitics compared to wire bonding.

Unlike wire bonding, in which the connections are made at the periphery of the die, flip-chip connections are in an area array covering all or part of the face of the die.

Flip chip is almost always performed on packages with substrates, although a few designs utilize leadframes. The die does not have to be face down with leadframe-based parts; the leadframe can be designed to reach over the top of the die in a face-up position for interconnection, as is the case with Carsem's FCOL.

Preventing Crosstalk

Being face-up prevents cross talk with the PWB-an important consideration with RF chips.

The bumping processes involved with flip chip tend to be expensive, although less so than wire bonding when I/O levels are very high. Additionally, flip chip is not suitable for every application, and tends to be used for high-performance, high-I/O devices and low-I/O devices in space-constrained areas.

Flip chip allows for a higher density of interconnection points than wire bonding, because the array pattern of bumps on the die surface allows for a greater percentage of the total device surface to be used for interconnection.

This is in contrast to just the periphery being used, as in wire bonding. Thus, a smaller form factor is achieved in the overall package size when flip chip is employed; hence flip chip's use in space-constrained areas.

The use of flip chip is mandatory on any die with an I/O count so high that the pads cannot fit around the die perimeter. Though this number is die- specific, it almost certainly applies to I/O counts above 700.

High clock speeds as well as increasing functionality of the chip drive the need for higher I/O counts and faster package performance than can be obtained by wire bonding. Most microprocessors switch to flip chip when their clock speeds reach 400 MHz. Flip chip is also used for some high-frequency RF devices.

High-end applications for flip chip include ASICs, chipsets, FPGAs, graphics and microprocessors supporting servers, PCs, and telecom. The I/O range of these devices is often in the low- to mid-100's (476 to 625) I/O to several thousand I/O.

The low end of the range is from 8 to 40 I/O for FBGA/DSBGA packages, and is often employed for RF applications. The I/O range for QFN/DFN packages with flip-chip interconnection is anywhere from 4 to 80 I/O, with most applications in RF and power management.

Economical at Low End of I/O Range

At the low end of the I/O range, flip chip can be fairly economical. Underfill epoxy can be applied relatively simply, because there is not much area to cover, so throughput is faster than for a larger die.

At the very high end, flip chip can be the less expensive option, as the substrate size can be reduced with array interconnection patterning, and the interconnection is completed simultaneously, not sequentially, as with wire bonding. The middle ground, relatively, tends to be more expensive.

With all its advantages, flip chip as a package interconnect is enjoying tremendous growth, with a forecast compound annual growth rate of 55 percent between the years 2003 and 2008.