The International Magazine for Device and Wafer-Level Test, Assembly, and Packaging Addressing High-density Interconnection of Microelectronic IC's including 3D packages, MEMS, MOEMS, RF/Wireless, Optoelectronic and Other Wafer-fabricated Devices for the 21st Century

Archives >> July 2004 issue
July 2004
Chip Scale Review is produced for a worldwide audience of engineers, specialists, researchers and end-users of chip-scale and wafer-level back-end electronics manufacturing in print and digital editions. Chip Scale Review covers the chip-scale, flip-chip and wafer-level packaging market with a thoroughness unmatched by any other magazine.

• Wafer Bumping: Wider Technology Choices Compete While Processes Strive for Maturity

• International Directory of Wafer-Bumping Service Providers

• Lithography for Wafer-Level Packaging

• Mask Aligners for IC Packaging Applications

• Using Steppers for Wafer-Level Packaging

• A New Approach to Wafer-Level Packaging Employs Spin-On and Printable Silicones

• Plasma Processing for Enhanced Underfill

• The Past, Present and Future of IC Packaging

• Solving Today's Tough Bond-Testing Challenges

• Wireless Applications Are Driving KGD, but Memory-Test Complexities Persist

Table of Contents

• Publisher's Letter: What a difference two years make!

• Assembly Lines: Intel Corp. and the rule of Dr. Moore's law

• Trendlines: Where have all the products gone?

• Standards: Marking, symbols and labels to identify lead-free assemblies, devices and parts

• Electronic Trends: Wafer-level packaging offers performance benefits of FCOB

• On Test: N-detect testing can improve quality

• Test Topics: Economic forecasts are a piece of cake!

• Industry News

• Engineer's Bookshelf: Carbon Nanotubes

• Calendar

• Tools & Technologies

• Inside Patents: How to file patent applications

• Ad Index

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ASMIASM International35.053.27
CSCDCascade Microtech3.630.00
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