Information on products or services covered in this article

By Dave Huntley, KINESYS Software, Petaluma, Calif. [kinesyssoftware.com], Steve Chelstrom, Freescale Semiconductor, Austin, Texas [freescale.com] and Andre van de Geijn, Philips Semiconductors, Bangkok, Thailand [philips.com]

Figure 1. Integrating a diverse supply chain is a challenging business when so many companies, factories and data paths are involved. (KINESYS Software)

The journey a device takes from its silicon origin to final application is no longer as simple and linear as it was in the past. Today, most packaging is outsourced. And with the advent of wafer-level packages, wafer bumping and inspection are now outsourced, too.

Additionally, a growing trend is to combine several devices, often from different semiconductor manufacturers, in a multi-chip package.

Performance characteristics of these devices must be matched if the composite device is to perform as designed. Thus, we are left with a situation in which complex packages composed of devices from multiple device suppliers are bumped, assembled and tested at numerous locations (see Figure 1).

Production sometimes needs to be redistributed to other factories on short notice and with a minimum of interruption, if huge losses are to be avoided.

Because of the amount of processing and the many companies involved, it has become increasingly difficult to manage the business-to-business integration and logistics involved, let alone propagate the necessary manufacturing data forward and backward through the supply chain.

Figure 1 shows an increasingly common scenario: An IC manufacturer designs a new device and selects devices from other IC manufacturers to be stacked on the new device.

The new device is fabricated at a wafer foundry, bumped, inspected and tested at a separate bumping foundry, assembled by one or more assembly foundries and finally tested at a test foundry.

All the entities shown are separate companies, and they all need to feed data forward through the whole process and receive feedback from the final test results. Today, the forward path involves many data conversions; each represents risk and possible data loss. The feedback path is virtually non-existent beyond summarized batch yield reports.

Data Formats

Clearly, the industry needs a standard unified and reliable way to exchange manufacturing data. There have been attempts to standardize data formats, most notably the Teradyne Standard Test Data Format (STDF), and the KLA INF format for inspection data. Although STDF and INF are widely supported, they are still proprietary formats.

RosettaNet is a standards organization chartered with enabling secure, business-to-business transactions via the Web. RosettaNet has recently published the 7C7 PIP Test Data Notification standard, which may in time replace STDF and INF.

None of these formats addresses wafer maps containing bin code data generated at wafer sort. Today, these are represented in a proprietary format. A few hundred wafer-map formats are currently in active use around the world.

Wafer maps are normally exchanged via shared FTP sites. This represents both a security and a reliability risk.

Exchanging critical data via shared folders, either between companies or between the factory and the equipment, exposes that data to loss or corruption with no traceability. The data should be stored in a secure database and exchanged via a transaction executed and verified by both parties.

Figure 2. The E142 standard can be applied in unexpected ways, including the representation of a reticle shot map

SEMI Standards

Earlier SEMI standards (G81, G84 and G85), approved in 2000, were limited in the following areas: 1) They cannot represent bin code maps for multi-product wafers, multi-chip packages (such as system-in-package) or singulated devices; 2) G84 is limited to strip maps; and 3) G85 is not based on a formal XML Schema and may be open to interpretation.

The SEMI E142 Specification for Substrate Mapping, approved in October 2004, resolves these shortcomings and also adds the ability to track individual devices from the wafer to strip to the singulated device with a unique device identifier.

E142.1, approved in March 2005, defines the XML Schema to represent the data in E142. The upcoming E142.2 and E142.3 standards will address factory-to-equipment and factory-to-factory data exchange, respectively.

Moreover, E142.3, based on web services, resolves the security and reliability issues that plague exchange via FTP sites. There is a new activity to align E142.3 with the RosettaNet 7C7 PIP standard so that E142 data can be transferred in a RosettaNet transaction.

Other Applications

Even though wafer fabrication was not included in the scope of SEMI E142, Philips Semiconductors has discovered that it is a perfect format for storing reticle layout information (see Figure 2).

The traceability loop can then be extended back into Philips' wafer fabrication facilities. Having reticle layout information available during wafer test helps Philips locate reticle problems.

Philips also uses the information to set up bump and test rules, to designate, for example, which dies should not be tested or bumped.

Figure 3. Wafer ID (OCR) location can be defined using the E142 substrate layout schema.

Furthermore, Philips is considering using the substrate layouts to indicate where the wafer ID OCR is on the wafer (see Figure 3).

This information could determine where the wafer ID can be found by a reader and where to apply a mask in the bumping process so that the wafer ID is not rendered unreadable by bumps.

Implementation

Freescale Semiconductor of Austin, Texas, has already implemented SEMI E142 internally (see Figure 4), and has succeeded in convincing several of its partners and service providers to follow suit.

Freescale is using the standard to drive its inkless efforts and will move to the SEMI E142.3 web services standard to eliminate its current FTP-based process as soon as possible.

The web services will change the current FTP "push" system to a "pull" system allowing the internal and external manufacturing sites to pull maps on an as-needed basis, which will provide the flexibility to make last minutes changes in vendor selection for probe and assembly.

The E142 schema also presented Freescale with a platform to build additional applications that will improve die traceability and outgoing quality.

With the growing use of E142, its acceptance as the uniform data exchange format between factories looks assured.

Wafer Mapping

The process of using electronic bin code maps to replace the ink dots on a wafer to indicate which devices failed at wafer sort is commonly referred to as "inkless assembly."

Inkless assembly is not new, and most die bonders support a standard interface to download and upload such maps. That standard interface is limited to the simplest cases, where there is a uniform 2D array of devices on a wafer to be mapped. If that is the sole requirement, there is no need to change.

Figure 4. Freescale's FactoryView system is based on the E142 standard.

Multi-Product Wafers

Robert Schultz, writing in an MIT thesis*, notes, "Multi-product wafers, a scheme of fabricating several products on a single wafer, can save 75 percent of the manufacturing cost of low-volume products." Multi-product wafers are still a small percentage of overall production-but they are a reality.

If a die bonder needs to pick devices from a multi-product wafer, its current interface cannot provide the necessary data.

Although workarounds have been devised, they are specific to a certain wafer layout and involve custom modifications to the equipment.

E142 provides an elegant, efficient and flexible way to represent and transfer the necessary data, which can be implemented once and applied to all multi-product wafers.

Strip Mapping and Strip Test

Performing final test while devices are still in strip form (strip testing) is analogous to probing a wafer at wafer sort. The same motivations exist to represent bin code data electronically in a map rather than physically marking the device. Strip mapping is really just inkless assembly for strips instead of wafers.

The complex, multi-chip devices being manufactured today, such as stacked SiPs, are analogous to the multi-product wafers mentioned above in that they cannot be mapped as a simple 2D array.

Much like the wafer prober, the strip handler may download a map indicating devices to skip, perform the testing and then upload the bin codes to be passed on to laser marking and singulation. E142 is substrate independent and will work just as well for complex packages on a strip as it does for multi-product wafers.

Device-Level Traceability

Device-level traceability is the tracking of the XY location of a device on the wafer to the XY location on the strip and ultimately to the singulated device with a unique device identifier (see Figure 5).

There were no standards to address this issue, prior to SEMI E142.

Marking the device at the wafer level does not help with tracking the device on the strip. Furthermore, the cost of burning the device ID and reading it is often prohibitive.

Figure 5. With device tracking, it is possible to drill down from the wafer lot to the strip to the device or, conversely, scan a device ID and retrieve the strip ID and XY, wafer ID and XY and wafer lot.

Standard Support

Equipment vendors cannot afford to implement a new standard, such as SEMI E142, without a hard requirement from customers.

Since the standard was only recently approved, it is not surprising that IC manufacturers and packaging foundries are only now gearing up to use its advanced features, multi-product wafers/strips, strip test and device traceability. It will not be long before E142 support shows up on equipment requirement specifications.

The equipment vendors who participated in the development of the standard are prepared to implement it on short notice in anticipation of their customers' requirements.

The Future

Although E142 was targeted at assembly, packaging and test, its application may extend beyond that.

Jacques Coderre, product manager-ASA products at Universal Instruments, Binghamton, N.Y., views applications in the transfer and mapping of placement locations, either on PWBs or other substrate types.

With silicon-on-silicon applications for example, dies are picked from wafers and placed onto wafers. Placement maps offer increased throughput and yield.

Conclusion

Integrating distributed manufacturing effectively in today's business environment is not for the faint hearted.

Industry standards, such as SEMI E142, provide a framework and a starting point. However, significant cooperation is still required between IC manufacturers, packaging and test foundries and equipment manufacturers to realize the full benefits available.

* R. Schultz, Strategies for Manufacturing Low Volume Semiconductor Products in a High Volume Manufacturing Environment, 2002.