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Gene Selven
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One of the nice things about being the publisher of a technology magazine is that I'm able to attend many exhibitions and conferences around the world.
Apart from seeing what's new (and what's not), I'm able to meet with the top management of companies, both large and small. These meetings produce not only current plans but offer insight into industry trends and forecasts, as well.
I recently attended the 10th annual KGD (Known Good Die) Packaging and Test Workshop in Napa, California.
The Workshop is hosted by the Die Products Consortium (DPC), a collaborative effort to advance the wide-spread adoption of die products, including bare die, flip-chip die and wafer-level CSPs.
Current members include Agilent Technologies, Analog Devices, August Technology, Chip Supply Inc., IBM, Intel, LSI Logic, Motorola, National Semiconductor Corp., Philips Semiconductor, Samsung Electronics and Texas Instruments.
The DPC is focused on technology solutions for testing, burn-in, shipping, traceability, standards and more. Member companies are working together to develop new techniques for reliability screening, lowering costs and providing more competitive solutions in die products for customers.
The 20-plus presentations at the workshop included:
Some very interesting presentations were made as to the future involving flip-chip, wafer-level packaging and SIP (system in a package).
Dr. Bill Bottoms, in his keynote presentation, pointed out:
Assembly and packaging costs exceed fab costs
System performance is based on assembly and manufacturing processes-not the chip manufacturer!
New challenges in the roadmap of the future include frequency, current density, pin count and thermal density, with new technologies to meet these challenges including compound semiconductors, low-K dielectrics and new test-probe contacts.
I could go on endlessly about the impact that KGD will have on stacked packages (TechSearch's Jan Vardamon forecasted that by 2006, 1 billion stacked packages will be used in mobile communications!)
However, I suggest that for more information you contact Larry Gilg, managing director of the DPC [gilg@dieproducts.com] to learn more about the workshop and the presentations made.
Much of my enthusiastic response to the KGD Workshop also holds true for several other small, regional shows. These include BiTS (Burn-in Test Sockets), ECTC, the Fabless Semiconductor Association's Suppliers Expo and Peaks in Packaging.
Unlike the major shows, which present so much compressed into so little time, the smaller niche events offer both exhibitors and visitors a chance to really get to know each other and to learn about trends in specific parts of the industry.
Unlike the rushed atmosphere of a large, national meeting, there's always time to see everything you want to see, to visit with everyone you want to meet and to take in as many talks as you may find helpful.
'User-Friendly' Shows
The niche shows are also more "user-friendly." Parking is nearby and often free. Your feet don't take the same punishment we've all come to expect from a mega-show, and if there's a registration glitch the top people are usually conveniently nearby.
For exhibitors, especially in these days of a sluggish economy, the cost to exhibit at a local conference is a fraction of what it costs in a major venue. And, of course, attendees at any of the more concentrated shows are highly targeted.
What's your take? Your comments are always welcome at gselven@chipscale review.com.
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