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 Publisher's Letter
A Look Forward to the Year Ahead

 Assembly Lines
Pantronix Continues Expansion with Facility Planned for Shanghai, China

 Wafer Level Watch
The Allure of Parallel Processing: Defects Are Found Earlier, More Easily

 Harvey Miller's Notebook
Innovex and Substrate Technologies' Goal: Make Form Fit Function

 On Test

Credentials for Testing Are Escalating; Enter the Certified Smart Person (CSP)

 Flip-Chip Focus
Issues in Reworkable Underfills for Low-Cost Flip-Chip Applications

 Industry News
Company News
Research Reports
Packaging Foundries
People in the News
FSA 6th Annual Suppliers Day
Calendar of Events
Editorial Index

 Features
Forecast 2001
The Experts Look at the Issues

Demands for Higher Speed and Greater Accuracy Are Driving the Die Placement Equipment Market

Die Attach Equipment: What Packaging Foundries Want

CSPs Present New Challenges for Die Attach Equipment

How Bluetooth Packaging Choices Impact System Cost

Achieving High Accuracy and High-Throughput Assembly with Flip-Chip-on-Flex

Web-Based Collaborative IC Package Design

 Tutorial
An Overview of Flexible Printed Circuit Technology

 Technical Forum
How New Developments in Hydrofluorocarbon Cleaning Technology Impact Flip-Chip Package Production
Effects of Pb Contamination on the Material Properties of Sn/Ag/Cu Solder

 Tools & Technologies
Tray Changer Hikes Placement Productivity and more...

 Opinion
Something's Rotten in Stockholm: The Nobel Prize Committee and the IC

 Patents
Micro-Machined Wafer-Level Package Employs a Memory Wafer with a Silicon Nitride, SiO2 or SOG Passive Layer

 Archives
2001
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2000
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1999
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July-Aug Sept-Oct Nov-Dec
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This month issue
An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics
January - February 2001

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Forecast 2001

A Look Ahead: 2000 Will Be a Tough Act to Follow

After finishing a year that, for the most part, could do no wrong, the assembly and test industry is hoping for an encore.

Can it happen again? Should we expect another chart-topping year? We asked key executives at a dozen hand-picked industry leaders to give us their best guesses in our second annual forecast issue.

If you've been attached to the semiconductor industry for more than a few years, you know how mercurial this industry is. One day it's feast, the next day-without a break in the weather-it's famine.

So far, the news is good. Even the industry's usual Nervous Nellies have been practicing remarkable restraint with their annual predictions of doom and gloom. Will the boom last forever? For 10 years? For 5 years? For 1 year?

We don't have all the answers. (If we did, we'd leave this grimy reporting business and sign on as a day trader.)

While many seers have perceived a slip in volume for PCs and their components, the wireless market continues to skyrocket. And companies making test gear are enjoying profits they haven't seen for decades, if ever, thanks to cell phones and their ilk.

A few examples? Sure. Credence Systems, a large vendor of final test gear, recently sold $26 million worth of final test equipment to Amkor, the industry's largest packaging foundry. Amkor, by the way, reported record sales and earnings for its third quarter 2000, posting sales of $649 million, up 29 percent from Q3 in '99.

Speaking of Credence, that company also reported record sales and earnings in August, for its third quarter, with net sales of $204 million, an increase of 289 percent (not a typo), compared to net sales of $52 million for the same quarter in '99.

Credence rival Teradyne, the largest supplier of test equipment in the world, also reported record sales and income for its third quarter 2000, with sales of $848 million. Net income set a new record, too.

Another? Cognex, the leader in the vision systems market for OEMs, inked a contract in the last quarter of 2000 to sell $13 million in systems to Japan's Shinkawa. That order came on the heels of an earlier (six months prior) contract for a similar amount. Shinkawa is Japan's largest maker of wire bonders.

Our experts penned their forecasts well before the end of the year to meet our deadline. As a result, many variables have come into play that were unavailable when they made their predictions.

These variables include the presidential race, which has become embroiled in the courts, as well as high-tech stocks, which have recently been soundly clobbered.

Even without these recent perturbations, we could not guarantee that 2001 will top last year. In fact, as most people will agree, 2000 will be a tough act to follow.


Ron Iscoff
Editor

'ATE Companies Will Enhance Parallelism, Speed and Uptime'

New test methodologies and advances in ATE system productivity will continue to reduce the cost of test.

The benefits of methodologies such as design for test (DFT) are becoming increasingly apparent, and, as a result, will become a greater part of test companies' product development strategies. DFT is already becoming practical in SOC testing.

To meet the industry's relentless need for economical test, ATE companies will enhance parallelism, speed and uptime.

The industry will reach well beyond 64-site test cells for memory testing and well beyond X8 parallel test in logic/ASIC/SOC test.

The bar (now at about 5,000 hours) will continue to be raised for tester MTBF. Cost of ownership remains an issue, even as test systems continue to become smaller and more efficient, as enabling micro-technologies advance.

Global logistics of supply, demand and material movement remain problematic. The new, and still evolving industry structure, consisting of fabless companies, IDMs and foundries, requires a global rather than local or even regional approach. One constant among these firms is the need for total, turnkey solutions.

The ATE industry will also play a more significant role in process improvement and yield enhancement by focusing on testing for manufacturing defects and delivering diagnostics.

Semiconductor manufacturers will also increasingly look to ATE companies to add value at wafer-level test, as part of the trend toward ATE delivering value in process improvement and test cost reduction. [advantest.com]

Nicholas Konidaris
President and CEO
Advantest
Santa Clara, Calif.

'Speed Is Driving Flip-Chip on Very-High-Performance Products'

Perhaps most significantly, the very nature of package-level interconnect is changing. Although wire bonding remains viable, it is becoming much more complicated because of the very high interconnect density.

Flip-chip-in-package is becoming cost competitive with wire bonding on certain low-end products. Speed is driving flip-chip on very-high-performance products. There are also more choices in substrates, with tradeoffs between cost and routing density. As packaging technologies evolve, the end result will be smaller devices with lower cost and higher performance.

The communications industry is driving the rapid changes in packaging. Consumers are demanding more mobile devices such as PDAs, cell phones and laptop computers. There is an increase in Internet users, which means more PCs and an ever-growing infrastructure to support these users.

These demands are emphasizing a decrease in the cost, size and power consumption of semiconductor devices.

Cellular phones are predicted to reach volumes of more than 400 million units this year, with size the key to the portability of products. Size demands, in turn, drive continued reductions in die lithography.

Lower operating voltages and tighter bond-pad pitches lead to smaller, denser die. The portability and increase in electricity usage of products also leads to demands for better system power management.

There is an explosion of specialized package styles and configurations, with features ranging from high pin-counts to low package parasitics and stacked die.

There is also an increasing demand for built-in thermal management, and the mainstreaming of RF and optical packages. System-in-Package offers an attractive alternative, especially when RF functions must be mixed with baseband digital processing. [amkor.com]

John Boruch
President
Amkor Technology
Chandler, Ariz.

'The Line Between IC Packaging and PWB Assembly Will Become Fuzzier'

Advanced packages like BGAs, CSPs and flip-chips represent the fastest-growing segments of the semiconductor packaging market. We see these emerging technologies continuing to grow.

Market drivers will continue to be the communications, computer and business equipment manufacturers. They, in turn, will be driven by their customers, who want more features, more capabilities and smaller and lighter electronic products at increasingly lower prices.

Therefore, the captive and contract PWB assembly manufacturers will be required to use new assemblies and techniques with new package designs. At the same time, customers are demanding higher performance in smaller packages from IC package assemblers. The resulting forces require new techniques to make and package chips as well as new assembly techniques for high-volume manufacturing of circuit boards.

These two markets are interdependent and will continue to merge, and even if revenue slows, the unit volume of ICs will continue to grow.

The unit volume of area array devices is growing at higher rates as the drive for lower cost with higher performance ICs in smaller packages replaces peripheral leadframe devices.

The line between IC packaging and PWB assembly applications will become fuzzier over the next few years. [asymtek.com]

Robert L. Ciardella
President
Asymtek
Carlsbad, Calif.

'Growth Will Come from Economic Influences and Technical Developments'

This year should be a great one for our sector, which, I believe, is now called Outsourced Packaging Services (OPS), as opposed to the "backend."

Growth will come from both macro economic influences as well as technical developments.

On the macro side, the world economies seem to be in a state of sustained expansion, although I disagree with the current pre-election rap that inflation is under control.

I personally believe this low inflation scenario is unsustainable due to pressure from fuel, and, more importantly, labor costs.

Our industry has enjoyed high growth rates during inflationary periods in the past and could very well do so in the future. Productivity gains will continue, as will the proliferation of gizmos, be they global positioning systems, WAPs, games or whatever.

What we don't know is which of these devices will capture the public's imagination, since these products are totally discretionary. Although people will pull back on expensive items, such as cars and homes, they will still have plenty of disposable income to buy disposable gadgets based on cheap chips.

Additionally, the wheels have been put into motion for significant increases in worldwide fab capacity, which are coming in two parts. First up are the Greenfield sites that were started in 1999. Next we have the shrinks and yield improvements within existing capacity.

These investments will result in increased silicon output, and will require all of those chips to be packaged, regardless of the format. In the past, assembly capacity was a given, as new entrants to the market blindly added vast amounts of equipment with the hope of gaining market share.

On the technical side, we also have some self-regulating effects. The barriers to entry are increasing with package proliferation, and shorter and shorter time-to-market windows. [cs2.be]

Steve Lerner
President
CS2
Zaventem, Belgium


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