January - February 1999 - ChipScale Review

January - February 1999


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Is 1999 'The Year of the Chip-Scale Package'?

With at least 100 CSP formats being readied to enter the market, OEMs, end users and manufacturers wonder if this is the "breakthrough" year for chip-scale.

By Ron Iscoff, Editor

Last year, Bernie Levine of electronic news authored a front-page article calling 1998 "The Year of the Chip-Scale Package."

A comparator stage holds Tessera µBGA® packages for inspection.
No question, CSP activity was moving fast and furious, in 1998. Among other notable milestones, chip-scale pioneer Tessera, San Jose, had signed more than 15 major licensees for its CSP technology by mid-year.

100 Formats

More than 100 CSP formats were in active R&D status as well, according to Vern Solberg, Chip Scale Review's applications & standards editor—with more on the way. Everybody who was anybody, it seemed, was moving quickly to enter the developing CSP market. And that included people who make equipment, manufacture materials and supply services.

About six months after the Electronic News article appeared, the U.S. received a shot to the solar plexus with the Asian flu—pushing many R&D programs back and sending equipment makers scurrying to the drawing boards in efforts to satisfy a suddenly shrinking market for assembly equipment.

Inherently, the Electronic News editor may have seen the correct signals at the time he wrote his article.

Due to circumstances beyond anyone's control, however, "The Year of the Chip-Scale Package" became convoluted into "The Year that Makers of Equipment for Chip-Scale Packages (and Developers of Packages, too) Fought the Tiger to Survive Another Year and Hopefully a More Profitable One."

This year, assuming some renewed stability on the world electronics markets, will be the year that CSPs come into their own.

We'll make our case with comments from some experts in the chip-scale world. We'll bolster those comments with our own gut feelings as well as random thoughts we've picked up. We'll also include the contrarians. Even this group is leaning toward heavy CSP acceptance this year.

First, let's hear from James L. (Jim) Young, a veteran of the maturing CSP industry. Young contends that, yes, 1999 will be the year that CSPs "arrive" as a major factor on production lines or as a common design-in. He specifically mentions CSPs at the wafer level, which includes his product at Intarsia Corp., Fremont, Calif.

"In recent presentations by Nokia," reports Young, "the company said that wireless has become the driver for the use of CSPs in portable consumer products."

Cell phone usage continues to expand rapidly, and the need for smaller phones with more functions will help drive the use of CSPs. No other package format will offer the needed miniaturization.

While the use of flip-chip is viable, because flip-chip requires underfill, other solutions will be pursued (and preferred) first, Young adds.

For its own account, Intarsia has produced peripheral wafer-level CSPs and was gearing up to produce its first grid array wafer-level package last December.

The company, adds Young, will introduce wafer-level products this quarter that will include filters, as well as bus management products. The hook at Intarsia is that it will offer integrated passives at the wafer level.

The products will be targeted for the wireless and computational markets. Intarsia is the first company set to design, fab and package integrated passive devices and RF subsystems in its own facilities. It will employ 100-mm, 150-mm and large-area panel substrates (350 mm x 400 mm).

Another Jim—this one R. J. (Jim) Walker, marketer at the Integrated Packaging Assembly Corp., San Jose, is virtually certain that this is the year CSPs will become a major production item.

"Many CSPs have already been in production for 1-2 years by OEMs such as Fujitsu, NEC and Sony for consumer applications—camcorders, cell phones and the like," says Walker.

Sockets are a rapidly growing supplier segment of the CSP infrastructure. (Courtesy of Texas Instruments)
"Although many subcontractors have been working on CSPs (Amkor, ChipPAC, IPAC), their volume to date has been small. But this is about to change," Walker contends.

Walker notes that the RF market for CSPs is increasing exponentially. Wireless products, too, are on the rise.

The Infrastructure

Many of the fabless chip companies and their customers are demanding a CSP for the next product generation. These companies, of course, employ packaging foundries. "As more foundries offer CSPs, the infrastructure will continue to grow."

To illustrate this growth, Walker advises looking at Amkor's recent ad campaign. "It has focused on the Tessera µBGA format and Amkor's capabilities to produce the Tessera package."

Giant Amkor/Anam, far and away the largest packaging foundry in the world, saw the CSP advance coming, says Walker. "The ironic thing is that I see CSPs replacing many of the existing packages, such as the TSOP, TSSOP, TQFP in the 8-180 I/O range instead of replacing BGA packages."

Shlomo Oren, CEO of ShellCase Ltd., Jerusalem, Israel, is another developer of CSPs at the wafer-level CSP technology.

Oren says CSPs will arrive this year in all portable electronic and memory card assembly lines. "Only a few types of devices will be used in relatively high volumes this year," says Oren. "These include Flash memory, SRAMs and EEPROMs. DRAMs won't be assembled in CSPs in large volumes until the end of the year."

From a socket maker's point of view, in this case Texas Instruments, the company won't flatly state that this is The Year, but TI's Peter Taxidis, marketing program manager in Mansfield, Mass., is comfortable saying that "increasing standardization will accelerate CSP growth this year."

TI, adds Taxidis, has developed FBGA sockets to meet the DRAM CSP ramp-up this quarter. "The DRAM market profileration of CSPs promises to drive down CSP costs, enabling broad market acceptance."

Materials expert Dr. Kevin Howard of the Dow Chemical Co., Midland, Mich., believes that the adoption of CSPs will accelerate this year.

"Whether this becomes a major factor depends greatly on the true ease of assembly, proof of rigorous reliability and cost savings.

"I do not believe the semiconductor world is likely to adopt any packaging options which add incremental costs to the package—whether that increase is from materials, additonal capital equipment costs or reduced throughput," says Dr. Howard.

The reduced size of the interconnect (such as the leadframe) may also bring new concerns with respect to thermal management in CSPs. "The reduced thickness of the encapsulant, as well, may lead to greater concerns about diffusion rates of moisture through the encapsulant," Dr. Howard adds.

While CSPs offer "an exciting new packaging opportunity," as with any change in package design, the rate of adoption will be directly related to meeting all of the criteria of existing package options," he observes.

"A Real and Viable Format"

For example, after a few initial years of confusion and concern about the direction of IC packaging, it is now clear that CSPs are a real and viable format, according to Joseph C. Fjeldstad, Tessera senior engineer and a Tessera Fellow.

"CSP technology, in fact, is arguably the one most responsible for allowing the continuing reduction in the size of handheld electronics," Fjelstad adds.

Intel Corp. is packaging much of its flash memory in the Tessera CSP format for use in such products as cellular phones, Fjelstad notes. "In addition, Japanese electronics makers are rapidly adopting and implementing CSPs for a full range of products."

Fjelstad says that Korea's Samsung Electronics is changing over much of its product to the Tessera CSP format and plans to expand the monthly output of 64-Mb Rambus inline memory modules from the current 100,000 units to one million units by midyear.

Area-array CSPs, such as the µBGA package, can be placed using a "chip shooter" at a rate 5-10x faster than the TSOPs they replace, Fjelstad contends. "This means that less capital equipment is required or that the manufacturing cycle can be shortened. Additionally, the first-pass assembly yield is significantly higher with CSPs," he says.

The Contrarians

Of course, not everyone is convinced that CSPs will take off in 1999.

Mark DiOrio of MTB solutions, Mountain View, Calif., does not believe 1999 will be the year in which CSPs experience a significant rise in production.

"Although the use of CSPs for memory products is becoming increasingly popular, and while DRAM and flash are expected to show strong growth this year, a large degree of oversupply exists in the memory market," says DiOrio. "This oversupply is forecast to remain into mid-2000."

DiOrio contends that this memory oversupply, coupled with the under use of current package capacities, which exists at many packaging foundries, could delay the CSP's market acceptance.

"There continues to be a lack of CSP infrastructure at the material, equipment and board level. Until this infrastructure is more fully developed, the economic incentives to use CSPs will lag—delaying significant increases in production volumes in the very near future," Di Orio says.

Considerable Volumes

Roland Heitmann, general manager of ESEC's ICSP-Micron Product Division, Cham, Switzerland, also feels that calling 1999 "The Year of the CSP" may be premature.

Heitmann declares, "CSP's 'arriving' means to me a step-function increase in usage. I do not think we can expect that to happen. Based on our data, we foresee a steady increase in CSP usage at growth rates of 50 -100% over the next four years.

"In 1999, we anticipate the consumption of about 500 million CSP units for the entire electronics assembly market, up about 100% from 1998 consumption."

These volumes, Heitmann admits, "are considerable, and CSPs must be considered a major new package type in the electronics assembly market—especially for the market segments comprising computer, telecom and consumer products."

Bill Garrett, materials engineer for EFTC Corp., Denver, Colo., is looking at CSPs as a major production item this year.

"However, other packaging formats are too embedded in the current market," Garrett says. "It took the better part of a decade for SMT to replace through-hole designs, and CSPs will probably follow a similar path.

It takes time and use for a new technology to be implemented in the larger marketplace."

David Taylor, a project manager-technical services at EFTC Corp.'s Tucson, Ariz., facility, says that "CSPs will not necessarily be a major factor on production lines yet. Technology diversity and the Asian economic crisis will impede investment."

Taylor also notes that Asia has been the leader in implementing CSPs for memory use. "While the DRAM evolution to CSPs seems certain, continued adoption across other product lines may be hampered by a lack of standards, a lack of reliability data and a clearly dominant technology."

Conclusion

Is this "The Year of the CSP," or simply another year of progress for CSPs?

Either way, the format is, with a certainty, becoming the preferred option for advanced memory packaging.

And as the technology develops with a greater emphasis on packaging at the wafer level, costs will continue to decline.

OEMs find improvements in package field reliability—even small ones—a very desirable trait.

Furthermore, as costs to employ CSPs fall across a broad spectrum of consumer ICs, the advantages of the CSP at 0.5 cent/lead or less will become nearly irresistible to users.



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