Q What are the technology drivers in dispensing? A Dispensing-like placement, printing or inspection-is challenged by a number of limitations. Rapid strides in innovation and technology push the limitations to their extremes, which, in dispensing, are very small amounts of fluid, very high speeds and very accurate, repeatable depositions. Q How do high speeds impact dispensing? A Dispensing speeds and placement speeds have been in lock-step for 20 years. As placement rates increase, they pressure dispensing speeds. The technologies used to keep up include multiple machines, high-speed linear pumps and non-contact jetting. Multiple dispensers can always be used, and may be required in some operations. Non-contact jet dispensing has been used in dot applications because it removes the need for numerous height-sensing operations on boards that are not flat or warped, which improves throughput speeds considerably. Q What does the need for repeatability add to the equation? A In many cases, speed and accuracy are traded off against one another. In underfilling, an additional factor, the viscosity drift of underfill materials over a short period of time, has historically affected repeatability. The linear pump, mass flow calibration, jets, beveled needles, and, in some cases, footed needles have made dispensing repeatable in the 1% range. Dispensing speed is ultimately limited by the physics of fluid flow after the fluid leaves the dispensing pump. Automated self-calibrating dispensing systems that remove operator intervention in the process have also made faster, more accurate and more repeatable dispensing possible in production lines. Q Why is underfilling considered so challenging? A It's not. Ten years ago good underfilling was difficult to achieve, but if someone makes that statement today, they don't understand the process. Now, underfilling has all of the factors required to make it a mainstream application technique. The difficulties include a number of real and perceived barriers. One barrier is lack of process knowledge. There are nearly a thousand successful production cells and lines performing underfill. The expansion into the mainstream is faster than the experience of many engineers, but the knowledge gap is closing fast. More engineers are developing underfill expertise, and the technique is quickly becoming standard operating procedure. What was considered beyond the realm of manufacturing five years ago is on the retail shelf in large numbers today. For example, almost all microprocessors running computers around the world contain underfilled devices. Companies avoiding flip-chip and underfill are losing a competitive advantage. Q What are the other barriers? A Formerly, the lack of the "right" equipment was a barrier to successful underfilling. Additionally, there are still many vendors learning how to build the correct tools, which makes it confusing and complex for the user. As the equipment world shakes out, standards are emerging. Still, there are many old and "wrong" tools being offered. With the correct tool and a skilled operator, operations can produce 24/7 in normal production quantities, yields and speeds. A few years ago, the material, techniques and machines were all prototypes. Today, there is still confusion, but many material vendors produce world-class materials, and many manufacturers are using established, stable processes. Separating the quality from the experimental is becoming easier. Simply put, today the underfill process is stable, quick and production-ready. Q Why are people underfilling CSPs? A Basically the answer is to improve reliability. CSPs are prone to solder ball connection failures when dropped. Handheld devices containing CSPs are underfilled in mass-production where it is easy and quick. Many manufacturers view the moderate cost of underfilling CSPs as cheap, compared to the risk of high field failures. Many manufacturers also view underfilling as an enabling technology for flip-chip-on-board. Q When should underfill be employed? A As a rule, all flip-chips are underfilled. This is true even on ceramic substrates, whose TCE better matches the silicon IC compared to PC board materials. However, CSPs that have higher aspect ratio solder joints were originally designed with the expectation that they would not require underfill. As noted above, many CSPs are underfilled in portable devices. For static desktop applications, however, underfilling may not be needed. The consortium at NASA's Jet Propulsion Laboratory in Pasadena, Calif., recently published work on the reliability of CSP devices. Their conclusions suggest that some CSP devices based on a flexible substrate design do not benefit from being underfilled.* Q Are there limits to how narrow the gap becomes or how large the die can be? A So far, underfilling has not encountered serious limitations with existing products. On one side of the spectrum, there is a point where gravity effects overcome the capillary effects. Those gaps are so large, however, that they have not been an issue. The advantage of underfilling CSPs is that these large gaps produce fast flow-out. On the other side of the spectrum, new materials and dispensing techniques, even 25-mm-square die, with 40-micron gaps, and 10,000 I/Os can flow out in 24 seconds. But the underfill process still has room for innovation, and we're still moving up the learning curve. Q When should molding instead of dispensing epoxy encapsulants be employed? A Molding is still the dominant method of IC encapsulation. Liquid encapsulation is approximately 5-10% of the packaging market. Two different types of packages dominate the dispensed market: fine-wire/fine-pitch dam and fill and large flip-chip die. In both cases, there are usually more than 600 interconnections. In wirebonded devices, there are often multilevel wire bond patterns that suffer from wire sweep during transfer molding operations. With flip-chip, recent publications describe molding compounds that have been specially developed for underfill. While transfer molding may have a greater throughput capacity, the costs associated with molding materials and molds will probably be greater than dispensing. Q How does flux residue affect flip-chip reliability? A Flip-chip attachment employs a reflow eutectic process with an array of SnPb balls. Flux is required to get proper reflow. The normal technique for applying flux is dipping the die into the flux. Often a tacky flux is used to help hold the flip-chip in place. During reflow, the tackifiers and excess flux leave a residue that may inhibit the flow of the underfill fluid and prohibits the epoxy from bonding to the surfaces of the IC and substrate. This can lead to poor underfill adhesion and can cause early failure of the solder interconnections. Also, flux residues on the flip-chip bump have the same effect as a void, causing bump fatigue. Residue, obviously, offers no positive benefits, so minimizing it is a goal. The appropriate amount of flux is the smallest amount that you can apply. Many companies use fluxes with no tackifiers. These appear similar to through-hole wave fluxes and are largely solvent-suspension based. These fluxes require a new deposition technique. One such technique is "jetting" the flux onto the substrate. This process has allowed many manufacturers to avoid residue and deposit very small layers of flux on the packages. These techniques are also improving throughput by removing the dipping operation from the chip placement equipment, which can give as much as a 20% improvement in throughput. *R. Ghaffarian, "Impact of CSP Assembly Underfill on Reliability," Proc. Apex 2000, March 16-18, 2000, P-AD2/3-1. |
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