March 2003 The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging Email the editor

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By Ron Iscoff, Editor

That Trumanesque cliché,* "If you can't stand the heat, get out of the kitchen!" is now appropriate to both the likes of Martha Stewart and the thermal management of integrated circuits.

A decade ago in the pre-Pentium 4 era, thermal management was important, but it was not a significant yield killer. With escalating device speeds came more heat, and now, thermal management is a vital part of the design, assembly and test processes.

Now poor (read lack of) thermal management equals bad parts, mad customers and a host of yield and throughput problems.

Figure 1. The ways heat can be transferred from the source (chip) in a package are illustrated. (Signetics Korea)

Thermal Management: A Multi-Level Issue

Thermal management should be considered on three levels, says H. B. Wee, senior engineer - package R&D of Signetics Korea (Figure 1). These are from junction to case, from case to substrate and substrate to external cooling source.

There have been many advances for providing greater heat dissipation in packages, says Wee. With peripheral-type packages, such as the typical leadframe format, thermally enhanced packages have been gaining popularity. Heat slugs, exposed pads and heat spreader-type packages all improve thermal performance, he notes.

Grid-array packages or laminated substrate-type packages can employ diverse thermal management, such as multi-layer materials. Enhanced thermal performance of packages like the PBGA or TEBGA can be achieved with a heat slug attached die top during encapsulation.

For TBGA-type packages, a ground via concept may be employed for improved heat dissipation. With some packages, such as Signetics New High Performance BGA, a heat slug material is applied directly between die and board, Wee explains.

The key considerations in package assembly thermal management include low cost, small form factor and module integration and reliability, according to Dr. Anthony Sun of United Test and Assembly Center, Singapore.

Dr. Sun concedes that perfect thermal design is often not achieved, while acceptable power management with a low-cost solution is still the major volume winner. "Cost is still dominating the package and assembly development."

Restricted Free Surface Area

Form factor is also important. Remember, it's now small, smaller, smallest. And, Dr. Sun reminds us, smaller package sizes restrict the free surface area for natural and forced convection, as well as the space for attaching external heat sinks. The chip-scale package, the UTAC research notes, faces great demands on its power dissipation attributes.

The use of multiple chips in the same package and system-on-chip schemes are both growing. Planning the thermal budget for multi-chip or even few-chip packages "has raised packages from the first level of electronic cooling into the second level cooling regime. This issue will definitely affect package reliability," Dr. Sun reports.

Consider that the maximum temperature inside the package is a function of the thermal footprint of the various chips that are dissipating different power at the same time. In many cases, says Dr. Sun, "the chips are heating each other up!"

Additionally, the power density and the application environment drive thermal management for package assemblies, says Dr. Jesse Galloway, senior manager at Amkor Technology Inc., Chandler, Ariz. "These requirements are translated into a thermal resistance."

High power applications are typically directed to packages that offer lower thermal resistance. (Figure 2 is a relative comparison of the thermal resistance for various packaging options.)

Figure 2. Relative thermal performance by package family is shown. All packages represented have a 7.8mm die and a 35mm body except for the 10mm body MLF and the 20mm LQFP. (Amkor Technology Inc.)

Dr. Galloway says certain package families are influenced more by electrical design than others. "Notice the larger thermal resistance for PBGA and TEPBGA2 package styles. In the case of the SBGA/SuperFC and MLF, most of the heat flows from the die to a high-conductivity material (copper heat spreader for SBGA/SuperFC and an exposed pad for MLF)."

The heat is released to the airstream for the SBGA and for the application board, respectively. In PBGA packages, however, the majority of the heat flows through a lower conductivity material (such as the substrate) before reaching the board, he reports.

Thermal Performance and Substrate Design

Dr. Galloway contends that PBGA-style packages represent a greater thermal design challenge because of the close coupling between thermal performance and substrate design).

Codesign is the interactive design process between electrical layout, thermal, mechanical and electrical analyses. CAD data are employed as a starting point in developing finite element analysis (FEA) models for laminate packages. A PBGA thermal model is shown in Figure 3.

Figure 3. FEA thermal model of a PBGA

Dr. Gerald K. "Skip" Fehr, formerly an OSE-USA vice president and now a consultant in San Jose, says the key questions in thermal management are "just the basic thermal questions we face each time."

These questions consist of device type, thermal load and the environment in which the part must sit. "From there, the package type is chosen, along with the required cooling technique, and any special assembly requirements are then established."

Some of the restrictions that may change assembly requirements are the amount of thermal load, flip-chip versus wire bonding, air cooling versus conduction cooling and package syle/size/shape restrictions.

Eggs and PCs: A Hot Combo! If you've ever bared the microprocessor on your PC's mother board, you know exactly how hot this device can get. Plenty hot! To prove it, a British techie fried an egg using the heat from his PC's 1500 MHz CPU, brand undisclosed. It took, according to Flomerics, that distributed the news of this experiment, only 11 minutes! "Although intended as a piece of fun, this experiment underlines the serious implications of the thermal issues that Flomerics believes will become the limiting factor in chip design..." The experiment employed bronze pennies to replace the original heat sink. [www.handyscripts.co.uk/trubador_egg.htm]

The greatest challenges, says Dr. Fehr, usually occur with a heavy thermal load, size restrictions and cooling technique restrictions. The most challenging thermal situations, he adds, are typically "the small packages that display poor inherent thermal capability."

The greatest thermal puzzlers are flip-chip packages with high power dissipations, which require lids and attached heat sinks, reports Dave Tovar, vice president of technology development at OSE-USA Inc., San Jose.

"First," says Tovar, "You must model the proposed thermal management solution to assure that it will work. In most cases, lids have to be tooled with an internal drilled cavity. This is a very expensive process.

"In addition, you must also be able to attach the lid and still meet the required moisture sensitivity levels. Finally, there might be the attachment of an external heat sink," he adds.

"Now you have a very big, heavy and cumbersome assembled device with no standard available tray to ship product to the customer."

The trend towards higher power densities for new devices, particularly those made with finer feature device technologies, is challenging small, fine-pitch BGA packages, says Dr. Roger Emigh, director of package characterization, ST Assembly Test Services Inc., Tempe, Ariz.

Dr. Emigh observes that the fine-pitch BGAs do not generally respond well thermally to the addition of such products as heat sinks, and the packages present a relatively small attachment area to the underlying PC board.

"As a result," he says, "When the die temperature in these packages exceeds the maximum allowed, it is difficult to improve the thermal behavior of the package significantly."

Possible Solutions

The only possible solutions, in many cases, according to the STATS director, are to lower the ambient temperature, reduce the power dissipation or change to another (typically higher cost) package type.

A key consideration in designing suitable thermal management systems for packages, Dr. Emigh emphasizes, is an accurate understanding of the operating environment.

Packages like the SSOP, SOT, SC, etc. with gull-wing leads present some of the greatest challenges in improving thermal characteristics, observes Mohabattul Z. Bukhari, staff engineer at Carsem, Ipoh, Malaysia.

This occurs, he says, because the existing leads that will be mounted to the PC board will (indirectly) limit the use of added thermal enhancement components.

"The only improvements that can be achieved will be in material selection or by a slight modification of the leadframe."

Figure 4. This enhanced package illustrates the use of a heat slug. (Signetics Korea)

Even with the use of various products to conduct heat away from the die (such as exposed heat slugs, heat spreaders, mechanical stiffeners), another problem develops. This, says Bukhari, is the ability to create a low CTE mismatch as more components are added.

With the recognition of thermal management's key role in packaging, many suppliers have added specially enhanced packages to their product offerings (Figure 4).

Perhaps only two factors dealing with thermal management of ICs are certain. First, devices are not going to get slower, less complex or cooler. Second, good thermal management will continue to grow in importance and will do so with a new urgency.

*Attributed to President Harry S. Truman, 1952.