By Dr. Peter Borgesen, Universal Instruments Corp., Binghamton, N.Y.
Decades ago, when the IBM Corp. and Delco (now Delphi) developed the original flip-chip approach, solder joint sizes and pitches were large, and the problems associated with the use of underfill were largely unknown. Today, however, improvements in equipment and component capabilities have expanded the boundaries-and the challenges-of manufacturing. The following discussion is confined to flip-chip soldered to organic substrates and underfilled. The development of a specific flip-chip process requires insight and sound judgment. Materials or process changes that were not earlier considered significant have been found to affect product quality. In general, the technology is not quite mature enough for anyone to write a process "cookbook" without being dangerously naive, instantly outdated and/or impractical. A few significant issues are discussed below. The Issues Flip-chip assembly yields depend, among other factors, including design, placement accuracy, substrate pad and solder mask tolerances, ball height statistics, substrate warpage, and fluxing technique. Assembly reliability, however, varies with encapsulant and flux type, solder metallurgy, chip passivation, the number of solder joints and distribution. Reliability is also affected by solder mask surface morphology and chemistry, laminate chemistry, substrate rigidity and pad metallurgy. The factors above become more critical with the trend towards larger die, finer pitches and smaller standoffs, as well as new materials development. Interactions between all the different materials in the system affect every aspect of reliability. The underfill, notably, will react with, dissolve, or allow the diffusion of moisture and numerous other chemicals from chip passivation, flux residue, etc. The effects on local underfill properties may be substantial. The consequences depend on the overall package, including die and substrate. Other conditions, such as thermal, mechanical and environmental, must also be considered. Chip Layout Often, users have little or no influence on package design. Those that do, however, should weigh factors such as signal path lengths, power and ground distribution, keep-out distances and silicon real estate savings. The design's effects on substrate pad design (assembly), substrate cost, wafer-bumping costs and bump-height distributions are also important. Remember, too, that moisture resistance and reliability may depend strongly on solder joint layout and distances to die corners and edges. The contact pads on the chip need to be coated with a solderable metallization. None of the commercial UBM structures appear to cause fundamental problems, but the materials are usually incompatible with semiconductor manufacturing. Applying the under-bump metallization later by sputtering and the lithography may add considerable cost. Accordingly, the only realistic maskless process is zincate-based electroless nickel deposition, which displays other limitations in terms of internal stresses and loads on the underlying chip metallization structures. Chip Bumping Solder bump height variations and bump damage result in different consequences for assembly yields, process flow and reliability. Vapor deposition of high-Pb solder offers some advantages but is usually very expensive. Plating works for eutectic SnPb down to very fine pitches, but offers little promise for anything but ternary and quarternary no-lead alloys. Moderately fine pitch wafers are quite readily bumped with any solder alloy using paste printing. Finally, bump transfer is showing considerable promise for pitches down to about 5 mil. Dicing and Backlapping Underfilling creates a rigid link between chip and substrate, magnifying the risk of die cracking during subsequent thermal excursions or handling, making defects more critical than for other packaging approaches. Thinning by backlapping will reduce the risk of cracking from dicing defects. It may, however, also introduce additional defects on the back and enhance cracking from there. Substrates Flip-chip capabilities are often dominated by the organic substrate technology and design. Pad metallurgy, as well as laminate and solder mask chemistries, may strongly affect encapsulant adhesion to the chip. The layout may affect voiding and reliability. Substrate reliability may be an issue in itself. High-Pb bumps require solder on the substrate pads, but this also helps compensate for warpage and variations in the heights of eutectic and no-Pb bumps. Conventional tolerances of ±2 mil (at ±3s) for line widths and solder mask openings, ±3 mil for mask registration, lead to requirements for relatively large mask openings and pad/trace widths. Fluxing Ultimate reliability is achieved with a strong water soluble flux and subsequent cleaning under the chip, but the effort involved, and the disastrous results of anything but a perfect cleaning, makes this option unattractive.
No-clean flux selection does, however, require accounting for the complex compatibility issues mentioned. Dispensing a liquid flux before the placement machine may enhance throughputs by 10% or more compared to dipping in a tacky flux inside the machine. Unfortunately, the distribution of relatively large amounts of no-clean flux residues across the entire die region tends to reduce the performance of the underfill significantly unless the fluxing activity, and thus the soldering yields, is reduced.
Careful optimization of flux jetting, a recent modification to the dispensing approach, does however appear to offer competitive soldering and reliability. The common alternative is to dip the chip bumps in a thin flux film maintained, for example, on a rotating drum with a doctor blade (Figure 1). No-Flow Underfill So-called flux encapsulants offer obvious advantages, such as elimination of the separate underfill step and the need for a nitrogen reflow ambient. Commercial materials are reaching maturity, but optimization of the dispensing, placement and reflow processes to ensure good assembly yields, minimize voiding and maximize reliability is far from trivial. Notably, the materials tend to require very careful drying of the substrates. Placement Depending on die design, substrate technology, and attachment process, flip-chip assembly tends to require a relatively high placement accuracy. Even if the substrate tolerances are much worse, the placement machine performance may still affect yields quite strongly. Figure 2a shows the predicted effect of placement accuracy (1s) on the defect level for an 8 mil pitch perimeter array die on the substrate in Figure 2b, assuming the tolerances above.
Reflow Assembly of eutectic Sn/Pb-based flip-chip-in-air typically produces reduced assembly yields and lower resistance to solder fatigue. Forthcoming no-flow encapsulants may, however, offer the only realistic hope of no-lead-based flip-chip assembly in air. Underfilling The underfill process, and the impracticality of repairing an underfilled chip, present the two most common obstacles to a broader implementation of the flip-chip-on-board (FCOB) technology. Pre-application of the underfill at the wafer level may largely eliminate one obstacle, but this concept is still under development. Underfilling by transfer molding offers potential advantages for component manufacturing and is approaching realization. So far, however, capillary flow remains the most common method of underfilling. Optimizing edge fillet thicknesses and minimizing voiding in an automated dispense process remains a challenge. Depending on the material, the former may require a separate "close-up" pass after flow is completed, potentially reducing throughput significantly. Performance in JEDEC-3 popcorn testing with a peak reflow temperature of 260°C has become a significant discriminator between materials. Overall, some of the best performing materials require curing for up to 2 hours at 150-165°C, which is not only slow but often arduous on assembly components. Rapid (snap) cures requiring less than 15 minutes often do not perform as well. Reliability Assembly reliability depends on a wide range of factors. In general, it is limited by the failure (open or short) of one or more solder joints, but this may be the final result of a long sequence of events. Solder extrusion and fatigue are, for example, sensitive to the encapsulant properties, as well as to those of the solder joint. Extrusion and bridging depend on temperature, stresses and encapsulant void sizes and locations. Fatigue and catastrophic failure of a joint usually depend strongly on details of encapsulant delamination, although fatigue crack growth may occur without delamination as well. Delamination depends on underfill process parameters such as prebake, dispense temperature, fillet thickness, cure ambient and profile, as well as flux residues and subsequent moisture exposure. Worst of all, many of the above dependencies are interactive.
Accelerated testing to identify compatible materials and processes is complicated by interactions such as those causing the preferred flux in a particular case to depend on substrate thickness. Fortunately, test results can, however, be rationalized and generalized on the basis of an understanding of the many underlying mechanisms. Commonly overlooked and not accounted for at all in standard tests is the effect of aging, even in the absence of humidity, on the performance of the underfill. Assembly Yields Often assembly yields can be improved considerably beyond current practice by proper accounting for the effects of substrate design, bumping specifications and processes. Conclusion Flip-chip attach to organic substrates offers a variety of interdependent technical challenges in final cost, process robustness (complexity), throughput, yield and reliability. Taken at face value, new applications often appear to behave very differently from rather similar previous ones.
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