Chip Scale Packaging from a European Viewpoint

Figure 1. Roadmap activities of NETPACK

First, remember that a "chip-scale package" is just a definition which limits the maximum package-to-die ratio; it is not a specific technology. The basic advantage of the CSP format is the progress in miniaturization it represents, with off-the-shelf components and standard assembly technology. The same effect can be achieved with chip-on-board and direct chip attachment. The implementation of chip-size and/or chip-scale packaging requires reliable CSP components, an appropriate PC board technology, and, of course, products which utilize the advantages of a small format at a competitive cost. Because of its diminutive size, the CSP is a challenge to PC boards.

European Markets

While mobile products, like camcorders, games and other consumer electronic items, are mostly imported to Europe from Asia, Europe is the base for such well-known cellular phone companies as Sweden's Ericsson.

The automotive sector is another strong electronics market in Europe. Space, in general, is not the limiting factor for automotive applications; cost is the driving force for miniaturization—with a key target being to reduce the board size without increasing the cost for components and assembly.

The reliability of CSPs is a major concern in Europe, especially when employed for power or automotive applications. For example, the development of European CSP sources for harsh environments is a target of the Esprit project ESCHETA.

Basic investigations with respect to CSP reliability are ongoing at the Technical University of Berlin and the Fraunhofer Institute of Reliability and Microintegration (FhG-IZM). Some examples of how CSPs are being implemented are discussed in this article.

NETPACK

NETPACK (the European Network in Microelectronic System Integration Technologies-Packaging), was established to help the European electronics industry meet the challenges of the world packaging market (Figure 1). Cooperation between the semiconductor industry and system manufacturers has to be stimulated to increase the demand for new products. FhG-IZM is organizing NETPACK, which is sponsored by the European communities within the framework of Esprit.

Table 1: The IC Consumption for Different Electronics Markets (1997)

In Table 1, the consumption of ICs for the different electronics markets is given for 1997. Telecommunications and automotive applications represent two excellent growth fields for Europe—which boasts about 32% of the world chip market in both fields—close behind the U.S. These markets, with the addition of mobile systems, represent the dominant European IC market applications. The perspective presented here is based on the response of European semiconductor manufacturers, assembly and packaging foundries and system manufacturers who were asked to predict their area array packaging activities from the present to 2004.

It is important to consider that the data do not comprise a consensus as to what must happen in assembly and packaging to address the expected developments in IC technology and system integration. Instead, this data reflects the actual activities and plans of companies addressing the automotive sector. Only the Semiconductor Industry Association's (SIA) data for the automotive sector can be compared directly to the NETPACK roadmap. Telecom-munications falls into both hand-held and cost performance categories. Mobile systems, as considered in the NETPACK roadmap, overlaps the cost-performance, hand-held and even the commodity product categories of the SIA roadmap.

Increased Complexity

The increased silicon complexity (higher number of I/Os, larger dice, higher speed, signal integrity and higher power dissipation) and overall system miniaturization are driving new CSP technologies. Against the predicted trend for dramatically increased I/O counts is the move towards higher levels of integration, both in single chip designs and through the use of multichip modules.

In terms of CSP adoption by markets, telecommunications and mobile systems are both prototyping with CSP. Production status will be achieved this year for mobile systems and in 2000 for the telecommunications market. The automotive market will require more time; however, conversion from prototypes to full production is predicted for 2002.

Of the three market applications discussed, telecommunications is the most performance-driven, therefore, packaging for telecommunications systems is particularly challenging. Form factor is important to the adoption of BGA and CSP area-array packages, along with flip chip, for portable telecommunications products.

Product types include portable phones (GSM, DECT), pagers, multimedia communications (sound, video, data, etc.). Performance is now limited in this market by packaging, and this application requires more I/Os at a finer pitch operating at higher frequencies and dissipating more power than either the automotive or mobile systems markets (Table 2).

Cost and Performance Issues

Mobile systems place a premium on reduced size and weight but are also very sensitive to performance and cost issues. The perspective for CSPs strongly reflects these factors (Table 3) showing the trend to reduced size and weight in all packaging and IC technology aspects.

Source: TechSearch International & FhG-IZM There is an overall, continuous increase in the use of microelectronics technology in automotive applications. A lot of purely mechanical functions have shifted to electronically controlled systems; moreover, electronics offer new possibilities for new functions. Typical product types and needs are summarized in Tables 4 and 5.

The needs for automotive applications are: immunity to radiation and pollution, lower cost and high reliability, increased circuit density, larger boards and smaller packages, more functionality and sensors for exhaust gas, fluid control and wear.

The automotive market shows the least aggressive changes of the three market applications for packaging and assembly, because of the conflicting needs for both high reliability and low cost. However, the automotive sector is already moving into production with BGA packages and has started prototyping activities with CSPs.

A European CSP Consortium

One example of a European CSP activity is the ESCHETA project within the European Espirit program. The project has a duration of three years and began in 1998.

Figure 2. The wafer-level Diepack developed by TU Berlin.

The consortium is headed by Alcatel SEL AG, Stuttgart, Germany. The technical objectives of the project are to develop and establish CSPs, which will be provided by European sources. Several types of CSPs are under development for use in telecom and automotive applications. The main goal for Alcatel SEL is to demonstrate the applicability of CSPs for relative high power and high pincount ASICs to be used in telecom switching systems. This application differs significantly from the common CSP usage for low power ICs in portable systems. Qualification and reliability testing for harsh environments will be performed by Alcatel SEL and Matra BA Dynamics for the consortium.

An innovative wafer-level CSP has been developed by the Technical University of Berlin and EM Microelectronic-Marin in Switzerland, which wants to utilize this development and offer wafer-level chip-scale packaging on a contract basis—assuming cost and reliability targets can be achieved. Figure 2 shows a prototype of the Diepack at wafer level.

Another CSP, the TCSP developed by Bull SA, France, in cooperation with Pac Tech GmbH, Germany, is based on a tape interposer using bumpless bonding technology. Within the project, the development is mainly focused on dice with a large power dissipation (2 - 5 watts) and dice with a large number of I/Os.

The third CSP type has been developed by Siemens Semiconductor, Regensburg, Germany, and is a rigid interposer type with flip-chip die attachment.

A laminate or ceramic interposer provides the redistribution between the chip pads and the grid array of the CSP. With the laminate interposer, the CTE is equal to the PC board and offers a high solder joint reliability. The ceramic interposer is preferred for higher thermal performance and is especially suited to RF dice (i.e., for GSM and DECT) with low pincounts. Small ceramic packages show a sufficient reliability on board.

Siemens Automotive will develop an innovative automotive control unit using the CSPs developed by the project. Because automotive electronics is mostly hidden within the car, any miniaturization in automotive is not the prime requirement. The following factors, however, justify the evaluation of CSPs for automotive application:

• Within world-wide manufacturing line compatibility, CSPs allow the use of standard equipment. There is no need for specific equipment.
• The KGD issue does not exist with CSPs.
• Pin-to-pin compatibility can be accomplished with CSPs. There is a possibility of repair at board level.
• Cost savings is not expected from employing the CSP but should result from the complete system due to product-size shrink.

Figure 3. Change of contact resistance for selected balls along the diagonal of a rigid carrier CSP as function of thermal cycling

Figure 4. Contact resistance for Diepack as function of thermal cycling -40 to +125°C

According to the definition of a CSP, the silicon die is placed close to the PC board, requiring the CTE mismatch to be controlled within the very short distance between silicon and package footprints on the board without the use of underfilling. Figure 3 shows the change in the contact resistance of selected balls during 1,000 thermal cycles of a rigid-carrier CSP. It is clear that the outermost balls (Ball 1 and 15) display a different behavior, which indicates a different thermo-mechanical load during thermal cycling. Such measurements are used to compare different CSP types.

Package Variety

Secondly, there is large variety of CSPs, with respect to structure and materials, which do not allow a generalized reliability assessment. There are CSPs using a thin flex layer as an interposer in contrast to rigid carrier CSPs.

While the rigid carrier can be designed to compensate for the CTE mismatch, the flex type CSP looks more like a flip-chip with larger bumps. In one case, a distance of about 30 µm has been measured between the die and the flex metallization. Understanding the reliability and the associated failure modes is one of the major research topics at the FhG-IZM.

Reliability must be treated with respect to board technology and design. For example, a rigid carrier CSP using flip-chip technology typically shows warpage during thermal treatment, as well as simultaneous warpage of the PC board. The reliability will be reduced if the warpage is limited by the board, e.g., by components on the opposite site. On the other hand no warpage has been observed for an overmolded flex type CSP; hence the requirements for board design are different.

Summary

Jürgen Simon	Dr. Andreas Schubert	Dr. Herbert Reichl

We have discussed a few European CSP activities which demonstrate that European companies are active in developing chip-scale packaging. Applica-tions for CSPs in Europe are mainly seen in automotive, mobile products and telecommunications. The reliability assessment is a key issue in Europe, as in the U.S. and Asia. While reliability requirements are different between consumer and automotive electronics, the need to understand CSP reliability better is still a gating item.

Within the European ESCHETA project, TU Berlin is charged with developing an innovative, wafer-level CSP technology called Diepack. We assume that these wafer-level CSPs can achieve the same reliability as flex-type CSPs. Currently 1,000 cycles (-40°C to +100°C) have been achieved for a Diepack with 196 I/O's using a 15 x 15 array with a pitch of 0.5 mm (Figure 4).

Severe cracks were found in the outermost corner joints after 1,000 cycles despite the results of the electrical measurements. The results are at least comparable, however, to a commercial flex-type CSP which was tested for comparison.

Mr. Simon earned a Diploma degree in physics from the University of Bielefeld. He has been a scientist at the Technical University of Berlin for 10 years, and, since 1997, has been in charge of the micropackaging strategies group at the Fraunhofer Institute.

Dr. Schubert holds a Ph. D. in material sciences from the Mining Academy, Freiberg, Germany. He joined the Fraunhofer Institute in 1993 and heads the fracture electronics group, which concentrates on the thermo-mechanical reliability aspects of advanced IC packaging technologies. He is also editor of Microsystem Technologies.

Dr. Reichl is a professor at the Tech-nical University of Berlin and head of the Fraunhofer Institute. Contact the authors at +49.30.314.72.872, fax +49.30.314.72.835.