This Simple Wafer-Level Package Offers High Reliability at Low Cost
"Semiconductor Device for Face-Down Bonding to a Mounting Substrate and a Method of Manufacturing the Same"
The purpose of this patent was the development of a simple wafer-level package that offers the same mounting efficiency as a flip-chip, but with the reliability of a conventionally packaged semiconductor.
The process begins by plating bumps on the die pads while in wafer form. Bumps can be solder or another material, such as Au.
A thermoplastic resin is then applied to the wafer by spin coating. This resin completely covers the bump electrodes. (The glass transition temperature of this resin should be less than the melting point of the solder.)
The resin-coated surface of the wafer is then polished to expose the bump electrodes. Enough of the surface is removed to expose a reasonable amount of each bump.
The wafer is then diced to provide individual packaged die. Since all of the packaging processes are done in wafer form, the result is a low-cost wafer level package.
Chip-scale package with built-in thermoplastic resin underfill
The mounting approach is basically the standard surface-mount process. As shown in the illustration, solder paste is screen printed on the pads of the substrate; the package is aligned to the pads and pressed into place, followed by reflow.
During reflow, solder paste makes the solder connection while the thermoplastic resin softens and bonds to the substrate surface to provide mechanical strength.
The chip is then attached to the substrate electrically and mechanically. As a result, the normal post-assembly underfill process is eliminated.
Variation 1 Instead of a single thermoplastic layer, two or more layers can be formed on the wafer. A first resin might be a thermosetting resin that will not soften when heated. The second (or outer layer) will be the thermoplastic resin described previously. This variation reduces the amount of resin flow.
The assembly process for this variation is the same as the previous method.
Variation 2 Warpage is a problem that may result when the wafer is only coated on one side. This problem can be easily prevented by coating the backside of the wafer with the same coating that is applied to the front surface. The two forces tend to balance out, and the wafer remains flat. The resin on the back surface can be thermosetting or thermoplastic.
If the back is coated with a thermoplastic, it will flow in the furnace, run down the sides of the chip and effectively seal the chip entirely.
If the backside of the chip or wafer is not coated, this can be accomplished after assembly by applying a suitable encapsulant to the back surface and allowing it to run over the edges of the chip.
Variation 3 Instead of a resin coating on the backside, a metal plate can be attached by adhesive to provide mechanical protection, minimize warpage and act as a heat spreader. This plate is also attached at the wafer level.
International Interconnection Intelligence is a market and technology research company specializing in the semiconductor packaging and interconnection areas. Contact David Francis or Linda Jardine by e-mail at email@example.com or by phone at 650.728.5270. [iii.com]