By Doug Anberg, Ultratech Stepper Inc., S
In the last two years, the market for flip-chip applications has experienced tremendous growth -a trend that is changing the landscape of the packaging industry. Fueled by the continued proliferation of smaller, higher-performing, high-speed digital devices-such as cellular phones, pagers, watches and sophisticated high-density smart cards, the accelerated boom in flip-chip packaging is unlikely to abate in the near term (Figure 1).
According to a recent study by TechSearch International (Austin, Texas), the flip-chip market will grow from 490 million units in 1997 to 2.4 billion units in 2004, an explosive 400 percent increase over seven years (Figure 2). While these growth predictions present a new market opportunity for chip makers and equipment suppliers alike, there are critical manufacturing challenges emerging that must be addressed.
Of primary concern to foundries and packaging facilities is the availability of high-yield, highly reliable, flexible and cost-effective equipment to accommodate their extremely varied flip-chip bump-bond processing needs. Existing bump foundries that are not utilizing stepper technology are being forced to decide whether their contact printers are sufficient for volume bumping, or if a stepper must be purchased. Packaging foundries that want to add bump processing to their services must decide whether to buy contact aligners or steppers for their lithography requirements. New tools are needed that can perform to the higher standards demanded by high-density packaging. Contact Aligners In the past, most flip-chip lithography processing, known as bump-bond formation, has been performed with contact aligners, whether operated in a contact or proximity mode. With flip-chip now the preferred packaging method for both high-speed digital and multi-chip module (MCM) applications, the need for flip-chip bump processing has increased, and packaging facilities are demanding more automated, flexible and highly reliable lithography tools capable of producing lower defect rates for the bump-bond process. The need to reduce solder ball pitch also continues. Currently averaging around 1 mm, in the future, BGA solder ball pitch will drop to 0.5 mm for high-performance applications. Chip-scale packaging, meanwhile, will require a pitch of 0.30 mm. The 1999 SIA International Technology Roadmap for Semiconductors predicts that 0.30 mm solder ball pitch will not be required until the 50 nm technology node, which is expected to be in place in 2011. Internet Requirements The small size and weight requirements of new handheld portable Internet access devices, however, are driving packaging densities at an accelerated rate. If this trend continues, packaging density and solder ball pitch are likely to exceed the SIA Roadmap's expectations, and 0.30 mm pitches may be needed as early as 2005. As bump packaging enters mainstream usage, prices for this service have become extremely competitive. Consequently, foundries and packaging facilities are pressed to squeeze even higher yields out of their bump operations. Indeed, as pad dimensions shrink and redistribution-level processing becomes the norm, any printed defects limit line yield, and a zero yield impact from the lithography step is therefore required. Contact aligners, however, may be unable to produce high yields, especially below the level of 0.5 mm solder ball pitches. They are limited, in particular, by contamination issues. This contact aligner limitation is true largely because their exposure method is not based on optics. Instead, their exposure mechanism consists of a light source plus a shadow mask, limiting their resolution when operated in proximity mode. This becomes an even greater problem when processing 200 mm wafers, due to warpage that causes non-uniform gaps between the wafer and the mask. Additionally, contact aligners are simply too slow to keep up with the high-volume needs of flip-chip processing on very thick resist films, which can require exposures in excess of 1 Joule/cm2. Finally, the time required for wafer size conversion can significantly impact overall productivity. Contact aligners have, in effect, become yield-limiting steps in the process, at the same time that the high-density chips that are candidates for flip-chip processing require even higher overall production yields to keep prices of final packaged devices competitive. Wafer Steppers Chip makers have therefore begun to apply traditional front-end lithography equipment to this back-end packaging application by shifting to the use of wafer steppers for bump lithography. Compared to contact aligners, steppers have been able to significantly reduce wafer defect density. This reduction is possible because steppers use 100 percent defect-free reticles with pellicle protection; their projection optics provide defect-free, non-contact imaging and their precision stage technology ensures superior alignment (Figure 3). Thus, steppers contribute zero yield impact from the lithography step. In addition, steppers add automation to the process, since one operator can control several machines.
Process Tradeoffs This has forced users who want to implement stepper technology in their bump process to make process tradeoffs and commit to either an all i-line or all g-line process even before purchasing equipment. But there are many different types of bump processes. Those with spin-coated photoresists, whose typical thicknesses range from 10 to 40 microns, are typically g-line sensitive. Processes with dry film laminate photoresists, with thicknesses of 100 to 150 microns, are typically i-line sensitive. Many fabs want the flexibility of using both types of photosensitive films. A second problem with steppers is that they have required tool-specific alignment targets. Bump-bond processing is a back-end application that requires aligning to existing product layouts that have already been fabricated on the customer's existing steppers. In virtually all cases, retooling of the customer's reticle sets to include additional stepper-specific targets for bump-level lithography is not a viable option. Nor is it feasible for a foundry to either limit its bump-bond business to customers that only use the same manufacturer's stepper, or to purchase steppers from a wide variety of manufacturers. Steppers also cannot easily handle multiple wafer sizes and thickness variations, or wafers with severe warpage (50 to 100 microns). Typically, it can take up to a week to change wafer sizes, an amount of downtime that bump foundries and packaging facilities can't afford. The need for multiple wafer-size flexibility is becoming especially important now that bump foundries are being required to offer multiple wafer-size processing capabilities. In addition, wafer steppers are unable to align and expose both thin and thick photo-resist films due to their limited focus range. The high-resolution, precisely controlled focus mechanisms typically found in stepper technology are ideal for processing high- resolution, thin-film photoresists. This high-precision focus control, however, typically limits the total range of focus positioning to approximately 10 microns, making it impossible to adjust the focus over the broader range required on thick films, particularly those in excess of 40 to 50 microns. Finally, steppers have a relatively low wafer- plane intensity that limits throughput for high-dose exposures.
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