Socket Developments for CSP and FBGA Packages

The growth of Five-Pitch-Array packages has created new contacting challenges for socket suppliers.

By Robert Crowley, Redpoint Research, Portland, Oregon

Chip-scale packaging is on the verge of achieving critical mass in the semiconductor industry, and more than 50 different packages have been developed by three dozen organizations.* Several products have already been introduced to the market, and 1998 promises to see many more CSP-based product rollouts.

Semiconductor companies and contract assemblers are tooling production lines for high-volume assembly of CSPs and fine-pitch ball grid array (FBGA) packages. Meanwhile, the infrastructure for CSPs is also developing.

This infrastructure includes standards groups, interposer and material suppliers, equipment makers, assembly companies, research groups, printed circuit board suppliers and socket companies.

Figure 1.A wide variety of contacting methods for fine-pitch sockets are available.

Fine-pitch-array package testing has created several contacting challenges for socket suppliers. These suppliers, in turn, have responded with a variety of solutions to meet demands for low-cost burn-in, high-speed electrical testing and strip-level testing. This paper addresses the state of socket technology for fine-pitch array-I/O CSPs.

CSP Types

The most common types of CSPs are rigid-interposer and flex-interposer packages with array terminals. Most of them employ a BGA format, although a few companies offer LGA style packages. CSPs are being produced with array pitches ranging from 0.5 mm to 1.0 mm. Table 1 summarizes the current I/O pitch for 26 CSP and FBGA packages that are made with arrays of solder balls or land pads.

Many companies are making parts with 1.0 mm pitch as a transition towards finer pitch. The use of 1.0mm parts is usually driven by customer demand for easier assembly. The most common pitch in production is 0.8 mm because it offers the best trade-offs between size and manufacturability. This pitch (and the similar 0.75 mm pitch used for some flash memory) can be used to make truly chip-sized packages for memory ICs that have a relatively large area and few I/O.

The trend towards 0.5 mm pitch solder balls is obvious. Texas Instruments, NEC and others produce CSPs with this pitch; however, 0.5 mm-pitch poses problems for PC board design, surface mount assembly and testing.

Most CSP sockets are based on a technology originally developed for either BGA packages or known-good die (KGD). The primary goal of the socket is to contact the solder balls or land pads of the package electrically while compensating for a reasonable amount of co-planarity error. As plastic BGA packages shrunk from 1.27 mm pitch to 1.0 mm pitch, socket makers responded by modifying existing sockets. To accommodate 0.8 mm pitch some companies pushed conventional contact techniques and others developed new contacting designs.

Figure 1 shows a wide variety of contacting methods for fine-pitch sockets. The contact probe should provide a small amount of wiping action on the solder ball to break through any oxide layers and provide good electrical connection. The most common types of contact probes are spring-loaded pins and stamped metal contactors. Both techniques have been adapted to fine-pitch probing.

Tweezer contacts, side contacts, and Y-shape contacts have been designed into 0.75 mm-pitch sockets by several companies. Yamaichi and Plastronics have rotated the tweezer contacts 45 degrees to decrease the pitch. Yamaichi is sampling 0.65 mm sockets and has prototyped even finer pitch sockets. Wells Electronics uses Y-shaped contacts for 0.75 and 0.8 mm sockets and is developing 0.65 mm-pitch solutions.

Stamped contact probes can be used for a large number of insertion cycles, but are not optimum for high-speed electrical testing due to the long signal length. One limitation of this contact type is that the socket is mounted to the test board in a through-hole method. This can create significant bottlenecks for escape routing of fine-pitch sockets on the test board, making 0.5 mm pitch sockets unusable.

Spring contacts are commonly used in pogo pin probes, and BGA sockets have been modified to make 1.0 and 0.8 mm-pitch FBGA sockets. Small diameter wire has been used to produce spring contacts for sockets with 0.65 and 0.5 mm pitch. There are several variations on the spring contactor. The spring can be used to directly contact the solder ball or to drive a pin that contacts the solder ball. While 0.3 mm-diameter contact pins are available, the cost is quite high, resulting in sockets that cost over $2,000.

Another contact variation is a probe pin with a helical coil outside the probe. In this case, the signal travels through the center part of the pin, not through the spring, which allows the probe to be used at gigahertz frequencies. If the electrical signal travels through the coil, the self-inductance can make the socket unsuitable for high-speed test. AQL Manufacturing Services makes 0.5 mm-pitch sockets employing this probe type and is currently building a 760-I/O, 0.5 mm-pitch socket for a 19 mm x 19 mm package.

Metal Probes

A variation on the spring-probe concept is a metal probe with a conductive compliant material beneath it, such as the sockets made by PrimeYield Systems. Anisotropically conductive elastomer materials provide compliance and electrical feed-through. These materials consist of wires or conductive spheres embedded in an insulating elastomer. A similar effect can be obtained using individual metal contacts with Tecknit's Fuzz Buttons® for compliance.

Conductive elastomers can also be used to contact the solder ball and the test boardÍs land pads directly. In this case, the wires extend slightly beyond the surface of the elastomer and provide a small amount of wiping action as the elastomer is compressed against the solder ball. Nonconductive elastomers are used by Johnstech International to hold small contact probes in place and provide compliance and wiping action for each contact. Both techniques provide a short (1 to 2 mm) signal path between the package and the test board.

Other CSP socket technologies were originally developed for KGD. These include conductive bumps on a rigid interposer and etched pockets in silicon interposers. These techniques are suitable for fine-pitch contacts but cannot handle much solder ball co-planarity error.

Flex circuit interposers are used for fine-pitch sockets, typically with an elastomer film beneath the flex circuit. Plated bumps and coated diamond particles are two techniques for contacting the solder ball. In general, flex circuit interposers offer tremendous potential for 0.5 mm socket solutions once the co-planarity and compliancy issues have been resolved.

CSP Testing

The holy grail of CSP testing is the ability to test all the components, at one time, while still in a strip format. By testing before singulation, manufacturers are able to gain many efficiency advantages. The main benefits are less handling and reduced test time.

The potential for damage increases each time a package is handled; therefore, the fastest and safest way to handle individual packages is to make singulation the last step in the process. Low- cost memory chips will require efficient testing solutions.

Each time a part must be picked up, time is wasted. Singulated parts must be located, picked, aligned, placed in a socket or contactor, removed, and then returned to a tray. To automate the process, handler companies, such as MCT and Delta Design, make equipment that can pick up 16 or 32 parts at one time and present them to contactor sockets for parallel testing. However, fine-pitch parts in trays may require optical alignment if the solder ball positions are not tightly related to the packageÍs outer dimensions. Strip-level testing requires only one load and align cycle for many parts at once (30 parts in the case of flash memory in the µBGA® package format).

Marking

Another advantage of strip-level testing relates to marking. If the parts must be marked after testing (e.g. speed ratings based on test bin-out), then singulated packages must be handled again. Strip-level testing allows all the parts to be marked in strip format after testing. A map of the test results can be sent from the tester to a laser marking system for unique marking of each package in the strip to indicate speed or temperature ratings or to identify bad parts.

Strip-level testing requires the cooperation of socket companies, testing companies, and automation companies. The industry will move towards strip-level testing in an evolutionary way for both the mechanical contacting techniques and the electrical testing techniques.

The first and easiest step in this evolution will be opens/shorts testing for a row of parts across the strip. If the strip has an array of 30 parts in a 3x10 array, then three parts can be tested at once; the strip indexes to the next position, and three more parts are tested. This reduces test time by two-thirds.

Allteq Industries makes automated handling equipment for wire-bond inspection of conventional leadframe packages. The company is working with AQL Manufacturing Services to integrate a strip-level tester for flex CSPs. The initial system will provide opens/shorts testing for one row of parts. Similarly, MicroModule Systems is working with partner companies to develop a strip-level test solution based on the companyÍs proprietary membrane technology.

Some manufacturers use a gang transfer molding process to overmold a small array of parts on each strip. For example, Amkor/AnamÍs Chip Array™ packages are made in strip format with four 42 mm x 42 mm islands of parts on each strip. Each island can have 9 to 100 chips. The next evolution of strip-level testing will allow testing a small array of parts on the strip. Similarly, a Tessera µBGA strip could be tested in 2x3 groups of parts instead of single rows. The final step in mechanical handling would be the testing of all parts in a strip at one time.

Many challenges exist on the electrical side of strip-level testing. While opens/shorts testing is relatively simple, it does lead to test problems when the number of devices under test increases.

One row of 48-I/O flash memory parts would require 144 connections while the entire strip would require 1,440 connections. Some companies are integrating the open/short tester directly under the test board to reduce cabling. The next steps in the test evolution are functional testing, at-temperature testing, and burn-in testing.

Burn-in testing presents a new set of problems. Foremost is the difficulty of making and maintaining alignment of all the solder balls with the test contacts. Once the strip is aligned and loaded, the fixture must maintain alignment at the burn-in temperature. Another issue is a combination of co-planarity tolerance and ball deformation. The contacting technique must have sufficient travel to compensate for differences in ball diameter as well as strip warpage or variations in part thickness, but the contact force must be low enough to minimize solder ball deformation.

Another challenge is the burn-in board itself. An array of fine-pitch packages requires a high-density burn-in board. If the contactor connects the solder balls directly down to the burn-in board with no fan-out, then the burn-in board density will increase dramatically along with cost.

The Future

Socket companies have responded to the need for FBGA test sockets by improving existing products and developing new designs. The problems of contacting 0.8 mm-pitch parts have been solved with many solutions available as open-tooled sockets.

At 0.5 mm pitch, many technologies are being evaluated and the contacting problems are far from being solved. Cost, co-planarity tolerance, and lifetime are major issues that remain to be resolved. In terms of productivity, strip-level testing offers tremendous potential. The market for single-package test sockets may decline as companies realize the benefits of automated testing in strip format.

*R. Crowley, Chip-Scale Packaging: Technology Analysis and Market Forecast, Redpoint Research, February 1998. crowley@redpointresearch.com. Table 1. Status of package I/O pitch for array CSPs

0.8 - 1.270.5 - 1.270.80.5

Company	Package Range	Pitch Pitch (mm)	Typical (mm)
3M	SEFA	0.8	0.8
Abpac	CSP BGA	0.75 - 1.0	1.0
AMD	FBGA	0.8	0.8
Amkor/Anam	fleXBGA™		0.8
Amkor/Anam	ChipArray™		1.0
ChipPAC	FBGA-T	0.5 -1.0	1.0
Citizen Watch	FC-PBGA	0.8 - 1.27	0.8
Fraunhofer IZM	flexPAC™	0.5 - 1.0	0.8
Fujitsu	FBGA	0.8 - 1.0
GE	COF-CSP	0.5 - 1.0	0.5
Hitachi Cable	Leadframe/TAB BGA	0.5 - 1.27	0.5
Hitachi, Ltd	Fan-out flex CSP	0.5 - 0.8	0.5
Intel	µBGA®	0.75	0.75
Matsushita	MN-PAC	0.8 - 1.0	1.0
Mitsubishi Electric	Molded CSP	0.5 - 0.8	0.5
Motorola	JACS-Pak™	0.5 - 0.8	0.8
NEC	Plastic FBGA	0.8	0.8
NEC	Flex FBGA	0.5
Nitto Denko	0.8 - 1.0	1.0
Rohm	Laminate FBGA	0.75 - 1.0	0.8
Sharp	F.BGA	0.8 - 1.0	0.8
ShellCase	ShellBGA	0.5	0.5
Sony	TGA CSP	0.5	0.5
Tessera	µBGA®	0.5 - 1.0	0.75
Texas Instruments	Micro Star™ BGA	0.5 - 0.8	0.5
Toshiba	FBGA	0.8	0.8