May 1998 - ChipScale Review

May 1998


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NEPCON West '98 Through a Chip-Scale Lens


By Harvey S. Miller
Contributing Editor

The chip-scale package is still a life-cycle infant, but it was a star at NEPCON West '98. On the show floor, three companies exhibited their CSP technologies.

Between exhibits and tech sessions, however, four distinctly different CSP varieties were presented, with each contributing novel features. Although competing in some markets, more often they will complement each other. Together they promise to create new markets and spur new interconnection infrastructures. Following is a description of each, plus our discussion.

FlipChip Technologies introduced its new UltraCSP™ on the floor and in a technical session. Features include wafer-level packaging, redistribution on die from peripheral to array configuration, eutectic solder, and 13-mil bumped (flip-chip) die with Dow Chemical Company's BCP used to passivate the die.

No Underfill
Additionally, no underfill is needed when the die is mounted on a printed circuit board substrate. That's an innovation! The result is a truly ultimate, removable package„almost no package at all.

Discussion: Large 13 mil solder bumps help absorb the stress of the materials' differential temperature TCE. Typical flip-chip solder bumps are 5 mil. Die shrinks confront any direct chip attach technology with the need for some redesign and retooling of redistribution patterns and spaces. In high volume market windows, that will be no problem.

The UltraCSP is aimed at low leadcount application markets, such as flash and other memories. Maximum lead count is not specified„and is probably not yet known„perhaps much below 50 leads?

FlipChip Technologies is a joint venture of Delco Electronics and Kulicke & Soffa Industries. Licenses for UltraCSP are available "at low cost." (Note that FCT offers a wafer bumping service.)

John Lau and Associates of Palo Alto, Calif., discussed the NuCSP land grid array. The primary corporate sponsor is World Wiser, the Taiwan-based PC board company making the package. Wafer foundry UMC fabricates, tests, and bumps the 32-in SRAM wafer.

Eutectic solder flip-chipped die are soldered on a rigid PC board substrate, "slightly larger than the die." Redistribution patterns route peripheral die lands to array format. Encapsulant provides underfill at the package level.

Process costs associated with Motorola's SLICC (slightly larger than IC carrier), notably solder ball composition, are cut. But the novel difference is no solder balls at the point of package substrate contact with the printed circuit board. Screened solder paste on the board is reflowed to join package contacts to the rest of the world.

By definition, the NuCSP is an LGA. Intel uses cavity LGAs to package microprocessors, which are socketed, not soldered to boards. The NuCSP approach is different and definitely lower in cost.

ShellCase Ltd., an Israel-based manufacturer, exhibited the ShellCase package, in which the entire wafer is sandwich-sealed between two pieces of glass. Contacts are formed on the die after one glass layer is groove etched. Then the die are singulated.

Features include wafer-level packaging, redistribution on glass from peripheral to array configuration, eutectic solder-bumped (flip-chip) package, no underfill needed under the package when mounted on printed circuit board substrate. The package is very, very thin„under 0.5 mm.

The package is aimed at under-100 mil die with low leadcounts, ideal for smart cards. (Die shrinks are not an issue in such high volume markets.) Licenses are available.

Aimed at Smart Cards
Tesssera's mBGA ® package was perva-sive. Tessera, after all, put the letters "CSP" on the packaging map, and, in the process, became the target for 30 plus competitors, including the 3 above. What a testimonial!

The package's main feature is the almost perfect isolation from stress of the die and its flexible circuit "leadframe," both encapsulated in a Dow Corning silicone with give.

Tessera is working toward a wafer-scale packaging solution. Another goal of the San Jose based company is solid core solder balls (Cu) using high eutectic 10-90 solder. This will provide a regular standoff for cleaning and facilitate rework. Harvey Miller is President of InfraFOCUS, a market research study firm and newsletter publisher. Contact him at 650/327.2029.



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Harvey Millers' Notebook, 05/13/99, 05/13/99, ID=9805/harvey1
Keywords=fm00 bk00

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