An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics July - August 2000 Email the editor

Die trace enables isolating CSP final test and board problems to wafers and sites on wafers. Die trace is the history of a semiconductor die from wafer probe to final test and possibly to its location on a board. It's started as a die's location on a wafer and is used to isolate manufacturing and reliability problems and to aid in improving yields.
	By Jerry Secrest Contributing Editor

Die Trace Methods

When die trace is required, or when a semiconductor company finds it beneficial, there are three efficient ways to supply it for CSPs:

• Digital fingerprint on the die
• Mapping through the CSP assembly process
• Putting the die ID on with a PROM

Each trace method is appropriate for specific applications.

Digital Fingerprint

The first method mentioned, "digital fingerprint on the die" is a new technique and employs an array of transistors on each die.

During wafer processing, each transistor in the array receives slightly different processing. The difference in each transistor is amplified such that a unique, digital fingerprint can be read from the die at wafer probe.

The electrical fingerprint is stored in a database and can be accessed in the future. After CSP assembly processing, the parts are tested and the digital fingerprint is associated with the fingerprint taken at wafer probe.

The cost of this method is an area on the die of about the size of a bonding pad. It may require added pins to read out the fingerprint.

Assembly Mapping

In mapping through assembly, wafer and strip maps, keep track of the die in the strip.

The mapping is started at wafer probe, when a software map of the good die is transferred from the wafer prober to a database.

At die attach, the map is transferred to the strip and the strip map is transferred to a database. The map can be updated as the strip goes through CSP processing. The strip map can also be pulled from the database for marking the part.

Die trace data or identification can be placed on the CSP package at this point with a 2-D mark. The strip map is updated again at test. At singulation, the good CSPs are pulled from the strip and placed in tape and reel for shipment. A reel map could be transferred with the reel of parts for trace or the trace information can be included in a 2-D mark.

PROM Circuit

Finally, the die ID in a PROM technique uses a PROM circuit on the die.

The die ID is written into the die at wafer test or at a laser trimmer. The die ID can be read at test after the CSP processing.

The cost of this process is the added area of the PROM and the added time to program the die ID. A PROM die ID may also require additional pins to address and read out the die ID.