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Current Issue
An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics
July 2001
Research & Development Spotlight

Researchers Working to Overcome Semiconductor Speed Limits Posed by Gate Oxide Thickness

Schaumberg, Ill.-Scientists at three venues are pursuing new semiconductor materials that they believe will enable them to overcome fundamental problems that currently limit the speed of semiconductors.

A researcher at Pacific Northwest National Laboratory operates an MBE system to change the characteristics of gate oxide.

The problems, according to researchers at Motorola Labs, Schaumberg; Oak Ridge National Labs, Oakridge, Tenn.; and Pacific Northwest National Laboratory, Richland, Wash., lie with the current gate insulating material, a layer of SiO2 about 35Å thick.

The SiO2 layer "gates" the electrons, controlling the flow of electricity across the transistor.

At the current rate of chip progression, experts say the gate thickness will need to be reduced to under 10Å in the next 10 years. However, once the gate thickness is cut to under 20Å or less (predicted during 2002), the SiO2 will be unable to offer effective insulation from the effects of quantum tunneling currents, and the devices will not work properly.

An effective gate insulator for gate thicknesses under 20Å will require new materials with higher dielectric constants (high-k materials) that feature a higher capacitance for a given thickness.

Working independently, Motorola Labs and ORNL have been developing high-k materials in the form of crystalline oxides on Si and other materials. The scientists now hope that by working together under a three-year research agreement, the trio will arrive more quickly at a solution to the insulation problem. [ornl.gov]

 
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