Incorporating BGAs and CSPs within a High-Volume Contract Manufacturing Environment

One of the main thrusts in the electronic packaging and assembly industry is the continual increase in circuit density and functionality per unit area at the device level-and, consequently, at the board interconnection level. The drive towards finer, denser and more complex components is merely a consequence of this complexity.

In the broad sense of the surface mount arena, peripheral architecture covers Plastic Leaded Chip Carriers (PLCCs), Small Outline Integrated Circuits (SOICs), Thin Small Outline Packages (TSOPs), and, particularly, fine-pitch Quad Flat Packs (QFPs), which are the industry workhorse.

These packages, which are lagging current and future requirements, are being gradually replaced by area array packages, with the BGA becoming the package of choice. The CSP may be considered a further development of BGA technology.

Formidable Alternative

The growing interest in Direct Chip Attach (DCA) technology presents a formidable alternative, but DCA is not expected to deter the development and application of BGAs and, more particularly, CSPs. Due to their leadless configuration, larger ball pitch and compatibility with existing surface mount board assembly equipment, BGAs avoid a significant number of the problems found in fine pitch assembly.

The recent explosive growth in BGA/CSP development has been fueled by the promise of exceptionally high yields. Obviously, it is becoming invaluable for a contract manufacturing PC board company to have the capability of assembling BGA packages with high first pass yields.

Board assemblers have gained significant experience in BGA assembly and have successfully integrated BGAs into their assembly processes. By adhering to several key design and manufacturing guidelines, reliable BGA assemblies can be manufactured with high yields in high-volume PC board assembly facilities. Understanding and making use of the advantages of BGA assembly, while minimizing the disadvantages provides the maximum benefits from this technology.

Test Vehicles

Two process-implementation test vehicles were designed at the Engineering and New Product Development Center at Dovatron Manufacturing New York (DMNY).

A study for developing and implementing a standard assembly process for BGAs, CSPs and Ultra Fine Pitch (UFP) components on one of the test vehicles is complete.

The next step is to study the finer, critical and relevant aspects of the process, address reliability issues and facilitate knowledge transfer by developing a Decision Support System (DSS) using the second test vehicle. This paper documents our efforts toward those improvements.

Initial Goal

The initial part of the research was carried out using Test Vehicle I. The overall goal was, first, to develop a fundamental understanding of the complex interactions involved in the high-volume production of area array assemblies. An additional goal was to formulate a process for a variety of CSP and BGA components using existing SMT equipment.

The purposes for which the test vehicle was designed are described below:

• To help characterize the no-clean stencil printing capability at the assembly line with diverse, advanced surface mount packages including CSPs, PBGAs and QFPs (fine pitch and UFP), assembled on a PC board.
• To facilitate the comparison of assembly capability between a developmental assembly line/assembly process and a contract manufacturing facility.
• To qualify standard packages, develop processes for them and standardize set-up procedures and inspection techniques.
• To serve as technological demonstrator for DMNY and prove the DMNY's capability to assemble these components.

Design Issues

The components used in the design of Test Vehicle I (Figure 1) include a 46-ball µBGA package, a 352-ball PBGA, a 225-ball PBGA and two 20-mil-pitch components. These 20-mil-pitch packages were a 208-pin QFP and a 40-pin TSOP. Also included were one UFP (16 mil) pitch 256-pin QFP and other chip components, such as 0402s and 0603s. The physical features of these components are described in Table 1.

Test vehicle I is an FR-4 laminated board with a thickness of 62 mils. It is an 8-up design with a single board size of 8"- 5.5" based on the preferred manufactured panel size of 18"- 24". It is a double-sided design with pad defined geometry on one side and solder mask defined geometry on the other.

The pads are coated with Organic Solder Preservative (OSP), and the pad sizes are adopted to a 1:1 design. Board flatness is measured to be within 10 mm per mm at the µBGA site. Three global fiducials are designed on each board. Local fiducials are provided for each fine pitch/UFP site and for all BGA sites. A total of 1300 interconnection sites are present on the test vehicle, including 577 BGA and 46 CSP interconnects.

Figure 1. Test Vehicle I layout

Stencil Printing Process Optimization

Objective and Experimental Methodology
The accurate and repeatable deposition of solder paste is a critical factor influencing the implementation of a high-yield surface mount assembly process.

According to research results, an improper setup of the stencil printing process can result in more than 60% of total assembly defects1. In this part of the research, the focus was limited to the "optimization" of the stencil printing process for some types of BGA packages and one CSP.

This study in process optimization was performed for conditions and constraints that were found at the contract manufacturing facility (in terms of experimental time needed, solder paste, squeegees, PC boards and environment).

Inferences and recommendations, specific to a contract manufacturing environment, were derived through extensive experimentation by applying the "Design of Experiments" (DOE) methodology. Process parameters were developed using the results drawn from experiments conducted on the stencil printing process.

Global Objective

The global objective of this experiment was to 'optimize' the solder paste stencil printing process for the Test Vehicle I, with a specific focus on solder paste deposition for PBGAs and one type of CSP. This objective was addressed by systematically dealing with the following sub-objectives:

• Defining the criteria for a good/bad print as indicated by experimental results;
• Understanding the stencil printing process for large input/output (I/O) PBGAs and chip-scale devices through the use of DOE techniques.
• Optimizing the stencil printing process based on print characteristics, devices and environment.

• Process and machine related factors. These were determined and controlled (fixed) on the basis of experience and results obtained from previous research2, 3 conducted at the same company.
• A DOE-based approach was also used to develop a comprehensive picture of the printing characteristics for 16-mil-pitch components.
• Significant factors were identified, and these factors were used to draw conclusions and to derive a "look-up table" to assist process engineers in print parameter optimization.
• Process recommendations and guidelines for troubleshooting were based on the results.

Table 1. Packages and their Physical Features
Component PBGA 352 PBGA 225 µBGA 46 QFP 256 QFP 208 TSOP	Body Size (mm) 35 x 35 27 x 27 6 x 8 30.6 x 30.6 31.5 x 31.5 20 x 10	Ball/Lead Size (mm) 0.75 0.75 0.30 0.18 0.23 0.20	Pitch (mm) 1.5 1.5 0.75 0.4 0.5 0.5

Experimental Setup

A eutectic, no-clean solder paste with a mesh size of -400 and a metal content of 90% was used in this experiment. The viscosity is documented as 800~1000 Kcps. A DEK 265 semi-automatic stencil printer, used on the production line, was employed for the experiment.

To decrease variations in the print process, a board support box was used instead of the magnetic-pillar-based support system provided by the printer. A set of polyurethane-bonded squeegees with a hardness of 90-94 on the Shore A scale and dimensions of 15 inches (length) x 0.25 inches (thickness) were used in the experiment.

The trailing edge of the squeegee featured an angle of 60 degrees. A laser-based inspection microscope was used to measure the print paste height. This microscope usually serves as an off-line quality control tool on the manufacturing floor to monitor and measure the height of the solder paste prints and their registration on the pads.

The stencil for the experiment was designed so that the volume of solder paste deposited for the two PBGAs and the µBGA would be at least 3000 cubic mils and 700 cubic mils respectively. The aperture size is 0.025" for 352PBGA and 225PBGA, and is 0.012" for the µBGA. All the apertures for the area array sites are circular, laser-cut, electropolished openings with a 0.001" ~ 0.0012" taper design. The thickness of this stainless stencil is 0.006", except for a 0.0045" step down at the 16-mil pitch site.

Experimental Design and Procedures

In this experiment, a mixed two- and three-level three-factor design was applied to the study of print characteristics for BGA components on Test Vehicle I. To assure appropriate resolution during the analysis of the data, four replications were performed for each experiment and each combination of controlled factors and levels.

The decision on the number of replications was influenced largely by considerations such as the material cost, the time needed to run the experiments and the variation of the printing environment (such as the humidity).

In this study, different levels of print speeds, print pressures and separation speeds were first surveyed on the manufacturing floor. (The experimental layout of the three controlled factors and their corresponding levels is shown in Table 2.) Then, a preprint experiment was conducted to ensure all parameter levels used in the experimental design (in high/middle/low level) resulted in prints that would be acceptable in actual production.

Measurement of solder-paste height was conducted manually with laser-based microscopy.

Table 2. Experimental Matrix
Factor Level 1 Level 2 Level 3	Print Speed (inches/sec.) 2.4016 1.6929 1.0630	Pressure (lbs.) 17.640 12.348	Sep. Speed (inches/sec.) 0.0709 0.1420 0.0709

Due to the short period of machine availability and time-consuming experimental operation, the first two replications and the last two replications were conducted on different days. The main difference between these two sections was the environmental effect, such as the humidity level. This may have had an impact on the results of the experiment. For each replicate, the sequence in which the individual factor/level combination was run was randomly selected. These measurements were first converted to an average value based on the component types and number of measurements at each component site. After each replication was completed, the next replication was started with the same random sequence until the entire experiment was completed.

Discussion

The results of the printing experiment are plotted in the form of line charts (Figure 2). This plot shows the data distribution and variation among these three different devices and the experimental sequence.

The benefit of plotting the line chart from the graphical measurements is that it can also be used as a tool to detect a mistake in data analysis and calculation. A model adequacy check was performed by analyzing the residuals.