Current Issue An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics August - September 2001 Email the editor

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The alternative, assessing the tenacity of mechanical bonding by non-destructive testing, is very difficult. The present industry practice is to conduct destructive evaluation to determine the highest level of statistically robust performance and then specifying "process windows" that hopefully assure never falling below a minimum requirement.

The difficulty with this approach is that chemistry and physics only allow a certain maximum value for any mechanical connection.

As geometries continue to shrink, loads-per-unit-area are increasing beyond what basic material science allows, making failure inevitable, unless very careful package and assembly process design are undertaken.

Computer aided design and modeling are available to provide additional insights that standard failure analysis may miss.

Mechanical integrity issues are managed on several fronts. All semiconductor packages contain mechanical stress, which must be mitigated. Stress may arise from differences in the CTE among the materials used. Another source is the elastic modulus, which may vary dramatically with temperature, particularly in polymers.

Effects of Thermal Cycling

A recommended solution to these issues is a firm grasp of the effects of thermal cycling on the materials used in the package design. CAD tools that include thermo-mechanical modeling capability can serve as a great backup to the usual bank of thermal shock and humidity at-temperature tests.

In designing encapsulants, the interface between the polymer resin and the filler is specifically engineered with these trade-offs in mind. Interfacial adhesion can be improved through the use of plasma treatment to atomically roughen the surface, and by producing chemically active sites that allow formation of a true chemical bond within the interface.

Similarly, in wirebond or flip-chip assembly processes, clean metallic surfaces produced by cleaning/fluxing have higher mechanical integrity as the number of true chemical bonds is increased.

Conflicting Requirements

Thermal integrity in the semiconductor industry revolves around two conflicting requirements: The first is the desire to use thermal energy to enhance diffusion or chemical reactivity to join surfaces. The second is to remove the thermal energy produced during operation of a device in order to maintain performance.

In almost all semiconductor packages, thermal management at the chip level is controlled by conduction. By definition, thermal conduction requires interfaces to be in atomic contact for the conduction mechanisms to operate.

Two mechanisms are essentially available: electronic and/or phonon conduction.

Electronic thermal conduction operates under the same requirements of electrical conduction by electron flow. Metals are the best example of materials with high electronic thermal conduction.

Since most electronic thermal conductors are also electrical conductors, however, their use is limited to metallic electrical pathways in packaging.

Phonon Conduction

Most packaging materials, such as polymers and ceramics, employ phonon thermal conduction and therefore require optimization of a different set of integrity conditions.

Phonons are atomic mechanical stress waves within an atomic lattice. The wavelength of a phonon changes inversely with temperature, and may vary from microns to angstroms, depending upon the material and its temperature(2). Phonons are transmitted by the physical act of adjacent atoms displacing each other.

Phonon thermal conduction is very slow compared to the thermal conduction by electrons common in metallic systems.

Integrity of a thermal management bond is focused on maintaining a mechanically stiff interface under which the atomic scale stress waves can travel and transfer. As in other waves, phonons can be scattered by irregularities on the order of their specific wavelength.

Poor thermal conduction is a particularly difficult issue in filled polymeric systems. One method of addressing poor thermal coupling of polymer to filler is to add chemical agents that enhance true chemical bonding.

Thermal bond integrity is usually evaluated by measurement of the temperature gradient within a package or assembly (Figures 3A and 3B). Ultrasonic evaluation along with simple infrared imaging can determine bond integrity.

Ultrasonic stress waves propagate through the solid again by phonons. Defects found by ultrasonics, therefore, would also impede heat flow. High-performance thermal bonds for heat sinks rely on greases developed specifically for the application.

It is common practice in flip-chip packages to bond additional solder interconnects to construct thermal diffusion pathways into the package structure.

Figure 3A. A scanning acoustic microscope can be used to verify thermal and mechanical integrity. This photo of a molded, wire bonded BGA shows a large area of delamination.	Figure 3B. This photo of the same areas exhibits uniform distribution, resulting in excellent adhesion and thermal distribution.

Scattering

Electrical integrity criteria for bonds demand the ability to move electrons across interfaces. To accomplish this feat, the interface must appear transparent to the electron wave. Of course no bond is perfect, so some scattering always occurs.

Scattering can be caused by several phenomena, but generally can be summed up as a disruption of a uniform crystal lattice3. Integrity of the bond is then simply defined as minimization of variation in this lattice.

Scattering is non-linear and maximized when the deviation of the electron lattice approaches the wavelength of the electron. Variation can be caused by simple formation of an intermetallic compound with a differing atomic lattice, formation of a Kirkendahl (diffusion) void, contamination on the surface, or even the archenemy of the temporary bonds formed in probe based electrical test.

At this level, the determination of bond integrity can be accomplished by metallographic, electrical and mechanical tests. Simple voltage current response electrical tests can be used effectively in the non-destructive evaluation of the efficiency of a bond.

Under low temperatures, electrical resistance can also serve as an excellent evaluation technique for intermetallic formation in metal/metal bonds (Figures 4A and 4B).

Figure 4A. A cross-section of a flip-chip solder ball was intentionally over-etched to show the intermetallic region and solder ball grain structure.	Figure 4B. The same image is shown at slightly higher magnification prior to over-etching.

Electrical test is particularly challenging when a high-performance electrical bond is required, accompanied by the requirement to minimize the mechanical stresses placed upon the bond pad structure.

This may present challenges with thin copper bond pads, known for a susceptibility to oxidation, and low-k dielectrics with minimal mechanical properties found in state-of-the-art chips.

Conclusion

Achieving maximum productivity, yield and reliability requires careful evaluation of the trade-offs between electrical, thermal and mechanical bonding performance.

Many other examples of bond integrity management will continue to challenge the semiconductor industry as a whole. High power densities, new materials and advanced architectures will make bond integrity management a practical and scientifically interesting topic for the foreseeable future.

References

1. R.W. Hertzberg, Deformation and Fracture Mechanics of Engineering Materials, John Wiley and Sons, New York, 1983.

2. M. A. Omar, Elementary Solid State Physics, Addison-Wesley, New York, 1975.

3. P.L. Rossiter, The Electrical Resistivity of Metals and Alloys, Cambridge Solid State Science Series, Cambridge University Press, Cambridge, England, 1987.