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Dr. Jennie Hwang on Solder
Editor's Note: For this special issue on solder, we interviewed Dr. Jennie S. Hwang, an international authority on the applications and properties of solder in surface mount electronics.
Q: What major changes have taken place in solders over the years?
A: Over the 16-year history of surface mount PC board manufacturing, many changes have taken place. These have been driven by the evolution of IC packages beginning with the 0.100" DIP, followed by the 0.050" pitch PLCC/SOIC, continuing to the 0.020" fine pitch QFP and moving today to the BGA and CSP. The users and suppliers of solders have responded in a timely fashion to the specific needs generated by each of these changes. Improvements in equipment for printing, dispensing, pick-and-place and reflow have been reflected in the key performance features of speed, precision, reproducibility and automation. Solders have also been employed in new and different ways: New uses include paste for through-hole components, ink jetting, solder bumping, etc. One thing which has not changed is the solder alloy 635n/37Pb, which still covers the majority of applications.
Q: How would you categorize the changes in reflow systems?
A: During the period of implementation and establishment of surface mount reflow manufacturing, the reflow oven has evolved from primarily IR heating to convection and from convection to increased gas flow. Conduction and other heating methodologies, however, have steadily served the market segments where applications are compatible. Solder paste as a whole has advanced well to accommodate the evolution of reflow ovens, and, most of all, the performance requirements demanded by new and diverse components. Emphasis should be put on the production yield as well as the long-term reliability of PC board assembly. Reflow profiles based on slower heating rates and cooler temperatures are more necessary with today's PC board assemblies. These reduced heating rates and lower temperatures will minimize in-process heat exposure, potential damage to board and components and residual stress.
Q: Where do advances in "no-clean" systems stand?
A: Advances in water-cleaning and "no-clean" processes developed to replace CFC cleaning have been successfully implemented with continued gains made by no-clean systems. Users' expectations have become more pragmatic and practical for no-clean systems. The expectation at the beginning of no-clean (1989-1990) was for residue-free soldering. After gaining an understanding of how no-clean solder pastes work, users are now willing to accept a reasonable amount of after-soldering residue, as long as it is functionally reliable and looks decent.
Q: What does the future hold for lead-free solders?
A: If patent issuance is any indicator of research and development efforts, then lead-free solders certainly have been an on-going subject of study. Some patent claims are quite broad and some are specific, but there has been significant activity in the U.S., Japan, China and Europe. There has also been much work targeted at the development of a direct substitute for 63Sn/37Pb for SMT manufacturing. An acceptable substitute will offer a melting point around 185°C and possess eutectic properties.
Q: How do you perceive solder's role as an interconnect material?
A: The ultimate goal of lead-free solder development is not only to eliminate the use of lead in solder, but to enhance the intrinsic material properties, making lead-free solder joints stronger and more durable than its lead-containing counterparts. These efforts are not linked to legislative and regulatory mandates. Lead-free coatings for component leadframes have been developed and are increasingly used. Palladium is the most common replacement for Sn/Pb. Alternatives to HASL (Sn/Pb) surface finish have also been developed and several lead-free options are available.
Q: What are the challenges and critical issues for solder and CSPs?
A: The top three challenges for CSPs are: 1. manufacturability at the SMT assembly level, such as suitability for pick-and-place; 2. cost (total cost including die, package and the motherboard meeting the required trace/via density and other characteristics); and 3. Endorsement by a major IC supplier. These criteria will also set one package apart from the crowd, while the number of CSPs continues to grow. Thermal performance and burn-in constitute other demanding areas, particularly as I/O counts increase. Critical solder issues for CSPs involve the manufacturing operation and reliability.
Q: What are your criteria for selection of a solder reflow system?
A: In considering a reflow system, the equipment and the materials, the important factors are:
Q: What are the key solder substitutes for interconnections?
A: Research for alternative technologies in the area of non-solder materials, such as metallic-particle-filled adhesives, anisotropic, conductive adhesives, and conductive polymers, has been performed to develop materials that are capable of providing the same interconnecting function as solders. Important advances have been made over the past decade; still, practical applications are rather limited. In line with the direction of IC development, the maximum efficiency of heat transfer is always in demand. The best heat transfer is obtained using the most thermally-conductive materials in conjunction with the shortest heat transport path in every level of design. For the purpose of thermal management, a metallic system is intrinsically superior to a polymeric system.
Q: What are the key environmental issues regarding CSPs and solder?
A: Environmental issues involved in the manufacturing of packages, including CSPs, include materials and processes. Key concerns deal with organic solvents, chemical waste compliance, waste disposal, use and control of hazardous and toxic substances and recycling materials, water and solvents. Totally "green" manufacturing is the ultimate goal and it is not too far-fetched to expect some manufacturers to accomplish this goal in the near future.
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