September 1998
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CSP Primer for original equipment manufacturers.
By Kazu Nakajima,
Flextronics International,
San Jose, Calif.
The assembly of chip-scale packages is not simply equipment-dependent or a matter of having people conversant with the technology. The ability to assemble CSPs involves technological capability, quality and the understanding of where this technology is likely to head. These issues will determine how efforts to apply the technology are implemented by OEMs.Trends in CSP assembly involve market knowledge as well as an understanding of the different types of devices, new directions in the technology, effects upon the manufacturing processes and a review of industry assembly techniques and applications.
CSP: Its Place in the Hierarchy
CSPs represent an effort to reduce the size of certain devices, resulting in increased board density and the decrease of part outlines. CSPs such as the µBGA® package have the smallest outline among all packaged parts and represent an intermediate step between BGA and flip-chip assembly technology. An extension of flip-chip, the CSP eliminates certain flip-chip disadvantages while keeping its benefits.Consequently, due to the impressive size reduction of CSPs, these devices are gaining attention, resulting in an increased number of designs incorporating CSP components. Since JEDEC (Joint Electron Device Engineering Council) and EIAJ (Electronic Industries Association of Japan) have settled on package standardization, CSPs are considered part of the BGA (ball grid array) or LGA (Land Grid Array) families of devices.
Also, documents such as the IPC/ ANSI J-STD-012 "Implementation of Flip-Chip and Chip-Scale Technology" are now in the process of implementation. EMS providers should anticipate that CSPs will become an everyday part of the assembly processes.
Figure 1. Various types of CSP's on PC card test module (assembled by Flextronics international) are shown.
Chip-Scale Packaging:
Interconnection CSPs are an aggressive approach to small-size devices, just slightly (microns) larger than the bare die itself. Their benefits enable space and weight savings accompanied by increased performance. A typical CSP is no larger than 120% of the edge dimension defined by JEDEC. The external I/O grid array of CSPs is typically pitched 0.5 mm or larger„smaller than a BGA but much larger than flip-chip's fine-pad pitch of approximately 0.25 mm. Some CSP types are essentially shrunken BGA packages and employ solder ball grid arrays to interconnect with a substrate, making them the smallest packaging method available except for bare die.
A key manufacturing benefit is that CSP on-board assembly processes are compatible with SMT (surface mount technology) and can be accommodated in most current PC board assembly operations capable of BGA assembly. CSPs feature the same easy handling, testing and rework benefits as SMT, and like BGA on-board assembly, CSP solder balls are compatible with PC board pad metallurgy for the SMT reflow process.
Figure 2. The use of CSP's on a PC board for handheld equipment, as shown is enabling the production of smaller and lighter consumer products.
Categories
CSP structures are grouped into five categories: flexible interposers, molded flexible interposers, rigid interposers, custom leadframes and wafer-level assembly types.1, 2 Figure 1 shows various types of CSPs on a PC card test vehicle. These types, along with their manufacturers, are reviewed here.Flexible Interposers use a flex-circuit interconnection as an interposer by which a chip is connected to the circuit board, similar to TAB tape interconnection. The most popular CSP of this type is the µBGA package, manufactured under license from Tessera by Advanced Micro Devices, Amkor/Anam, Hitachi, Intel, Mitsui High-Tec, Shinko, Sony and others.3 Sony4 and GE5 produce the flexible interposer type of CSP, using proprietary structures. Interconnecting the chip to the interposer may include flip-chip bonding and TAB-style lead bonding.
Molded flexible interposers are considered a flexible interposer since they also use a flex-circuit interconnection. However, this type of package is encapsulated with conventional molded technology to protect the chip and its interconnections. The µStar, produced by TI Japan4, is widely used throughout the industry, as is the Sharp Fine-Pitch BGA.5 Amkor/Anam2, Fujitsu1 and NEC6,7 have also produced versions of this package.
Rigid interposers use a ceramic or plastic-laminated rigid substrate as an interposer. Some rigid interposers use wire bonding to interconnect chip and plastic substrate. Since these are downsized plastic ball grid arrays, some PBGA packaging foundries offer them. Flip-chip bonding also utilizes the interconnection on the ceramic or plastic substrate, such as those used on the Panasonic C-CSP8 with a ceramic substrate and Motorola's JACS-Pak9, which uses a plastic substrate.
Custom leadframes are based on existing leadframe technologies. The lead-on-chip (LOC) type package may be considered a CSP, where the leadframe extends over the top of the chip. While most package manufacturers have arranged conventional LOC structures into types of CSPs, several companies have developed novel technologies for customized leadframe structures. Fujitsu SON, Hitachi LOC-CSP and the LG Semicon BLP are providers of arranged LOC types1,10. Fujitsu BCC11 and Amkor/Anam ABC15 have unique structures for this type of CSP.
Wafer-level assemblies: ChipScale Inc. , San Jose; and ShellCase Ltd. of Israel; and Tessera, San Jose, have developed CSPs called wafer-level assemblies, followed by other manufacturers who are developing such devices. In this CSP type, a chip is processed or assembled in wafer form before singulation. A thin-film metallization process is used to create metal runs extended into the normal waferscribe areas or to redistribute the IC bond pads to a standard grid array footprint.
Applications
Figure 3. The is a PC board for a cellular phone. The bottom view shows large pads on corners for the onboard attachment.
The driving forces currently behind CSP applications are in personal electronics, such as portable, hand-held and PDA (Personal Digital Assistant) products, as well as communication devices, such as cellular phones, digital cameras, camcorders, and palm-type PCs12. An example of a PC board in hand-held equipment using CSPs is shown in Figure 2. In those products, various electronic components, such as microprocessors, flash memories, RF drivers, and others, can be packaged in CSPs with high I/O counts (around 200) or low I/O counts.
Demand has pushed consumer electronics into smaller and lighter products. One of the most aggressive arenas for product downsizing is cellular phones, which compete on weight. Their size has been reduced to about 70g (2.5 oz) in Japan, which is achieved by using CSPs instead of the older quad flatpacks.
Figure 3 shows an assembled cellular phone PC board with one CSP that is functionally equivalent to two QFP devices of the previous model, and dramatically reduces size and weight. In this case, the engineer locates the CSP just behind the most frequently used switch in order to prove and demonstrate the reliability of an on-board CSP.
Panasonic produces over a million of these ceramic CSPs every month. The U.S. CSP market is following the lead of Japan and Asian companies, where the big semiconductor manufacturers, such as Intel, Motorola, AMD and so on, are beginning to employ Tessera's µBGA and/or other CSPs for their flash memory packages. CSPs domestically are also being utilized in memory cards and modules for digital equipment. (Figures 4 and 5 show memory module examples.)
The worldwide CSP market is obviously going to grow, as various projections forecast, in Figure 61,12,13. CSP production is estimated to be approximately 2,000 million units in the year 2000. Flexible interposer types (including both molded and non-molded categories) are expected to dominate, setting aside rigid interposer types, followed by custom leadframes, as reported by TechSearch International.1 Also, a dominant flexible interposer type seems to be a molded variation of packages such as the Sharp Fine-Pitch BGA and the µStar. In the future, wafer-level assembly products are expected to break into high volume.
Chip-Scale Packaging: Wafer-Level CSP
Figure 4. Tessara µBGA-package devices are shown on a memory board test vechicle assembled by Flextronics.
Wafer-level-assembled CSP is a very promising technology. Formerly, often called "Redistribution Flip-Chip," it is assembled in a wafer form. The redistribution of IC interconnections, most likely peripheral pads to create other configurations, such as a grid array, allow the integrated circuit to be converted to a CSP. In another words, the border between flip-chip and CSP is breaking down. Since flip-chip is a chip-sized device, this new development is expected to be the most aggressive technology in the CSP field.
Recently, Flip-Chip Technologies named its original redistribution flip chip, Ultra CSP 2,11 to illustrate the direction of the technology. The company uses Du Pont's BenzoCycloButene (BCB) as dielectric polymer layers to isolate redistribution routings and cover the entire area of the IC face in the redistribution process. Shinko and Fujitsu took another direction, and employed an encapsulant material as a dielectric layer in their Super CSP that is also a redistributed flip chip.14 Panasonic will soon launch its version of a wafer-level-assembled CSP.
Figure 5. This memory board contains devices packaged in the Tessera µBGA format.
Figure 6. Although estimates differ by source, CSP shipment projections are uniformly optimistic.
Integrated Passive Devices (IPDs)
Another recent development is a joint effort between Chip Scale Inc. and Intarsia Corp., Fremont, Calif., which has developed Integrated Passive Devices (IPDs) with Dow-Corning as its substrate partner. IPDs, in wafer-level-assembled CSPs, replace discrete passive devices on PC boards. For IPDs to become mainstream products, they must provide system designers with advantages in cost, size, electrical performance, and weight. Therefore, mainstream acceptance of integrated passives is not viable using standard molded plastic IC packages, such as DIPs and SOICs. These form factors are bulky, expensive, and low in performance.
A plastic package can add as much as $0.15-$0.20 to the cost of an IPD and worsens impedance and inductance issues. In addition, plastic packages are too large and too heavy to be accepted by designers looking to reduce weight and size in portable, hand-held and PDA/communications products.
CSP technology is a significant enabling tool to accelerate IPD market acceptance. It solves the size, cost and performance issues associated with other packaging approaches. With effective CSP implementation, Integrated Passive Devices will become as common in electronics systems as the transistors or diodes they replace. CSP has other significant advantages for IPDs, including enhanced electrical performance, and the potential to utilize standard SMT form factors such as grid arrays.
The technology that probably best lends itself to IPD is wafer-level assembly. These devices are low cost, lightweight and very high in performance due to the simplicity of the process and design. Several integrated passive companies are seriously developing or offering wafer-level assembled CSPs. For example, Intarsia offers Micro Grid Array (MGA) devices licensed from Chip Scale, Inc. Figure 7 shows a schematic of this CSP.
Figure 7. This schematic shows a Micro Grid Array. (Source: Intarsia Corp.)
Summary
Although CSP structures are categorized into several groups, most CSPs are essentially a shrunken grid array package type which ensures that the CSP on-board assembly process is compatible with current SMT processes. As a result, many CSP types already have been produced for on-board applications. The demand for hand-held consumer producers is the key determining factor in opening up the CSP market. According to several researchers, Flexible interposer types will eventually dominate the market, followed by rigid interposer and custom leadframe types.References
- CSP Markets and Applications, TechSearch International Inc., January 1998, p.8.
- Proceedings of the Third International Conference on Chip Scale Packages (CHIPCON), February 1998, p.17.
- Tessera, Proceedings of the Tessera µBGA Symposium, September 1996, p.1.
- The 12th Nikkei Microdevices seminar, November 1997 (Japanese), p.5.
- Proceedings of the 47th Electronic Components & Technology Conference (ECTC), May 1997, p.638.
- Proceedings of the 46th Electronic Components & Technology Conference (ECTC), May 1996, p.727.
- Proceedings of the 2nd International Conference on Chip-Scale Packages (CHIPCON), February 1997, p.14.
- Proceedings of the International Conference on Multichip Modules, April 1995, p.302.
- Advancing Microelectronics, November 1997, Vol. 24, No. 6, p.8.
- Proceedings of the International Symposium on Microelectronics, October 1996, p.594.
- Proceedings of the Third International Assembly and Packaging Foundry Conference (APCON), September 1997, p.4.
- Nikkei Microdevices, February 1998 (Japanese), p.40.
- Advanced IC Packaging Markets and Trends, Electronic Trend Publications, November 1997, p.1.
- Proceedings of 12th Microelectronics Show, April 1998 (Japanese), p.1.
- The first IEMT/IMC Proceedings, April 1997.