Current Issue An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics October 2001 Email the editor

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There are several current market drivers with the potential to significantly expand the role of die sorting equipment in bare die handling applications, and to reposition the process as a critical enabler to evolving assembly and test technologies.

Many of these opportunities cannot be successfully addressed without significant technology development efforts by the die sorting equipment community.

Let's review some of the more significant market drivers and initiatives.

First, the explosive growth in the market for optoelectronic devices has overwhelmed their traditionally operator-intensive assembly facilities, even those that belong to the recognized leaders in this space.

The current telecom market collapse notwithstanding, it is widely recognized that only automated assembly can provide the volumes, throughput and quality levels required.

Challenging Automation

Automation is challenged, however, by several unique characteristics of these devices:

• They are often very small (0.2 mm) and fabricated on fragile materials such as GaAs and InP.

• In-process inspection and/or testing of each device is often required.

• Wafers are often broken, but because even a quarter wafer may contain thousands of good die, they must still be processed.

• Many die, particularly those with delicate surface features such as MEMS, cannot be picked using standard tooling.

Figure 4. Die sorter with in situ inspection and tape/reel output capability

To address the specific needs of the optoelectronics die sorting market, several new equipment features spanning the entire process are required:

In addition to enhanced automatic vision inspection of the device prior to its removal from the wafer, in situ inspection of the back side of the die must be employed to ensure that no damage is done in the singulation or picking steps and that no contamination is evident.

In applications where in situ parametric testing of a singulated device is required, a mid-process station is added and interfaced to the customer's automatic test equipment.

Test results are fed back to the sorter, and devices are placed into the correct sort bin. The obvious advantage of in situ inspection (or testing) is that these mission-critical operations are accomplished without additional handling.

Prior to die singulation, wafers are attached to wafer mounting tape so that individual devices are held securely in place-not only during the scribe and break or sawing operations-but also through often vigorous post-saw cleaning steps.

'Unwelcome Issues'

Aggressive adhesion to the wafer mounting tape, however, creates unwelcome issues when the die sorter later tries to pick those devices. The use of UV curable wafer mounting tape, which provides aggressive adhesion during singulation and much gentler adhesion at pick-and-place, offers significant advantages.

Digitally controlled, synchronized motion of the sorter's ejector probe and vacuum pick nozzle, however, coupled with low contact force, are also required to ensure the device is picked cleanly and without picking-induced damage.

In traditional assembly operations, individual die are picked from the wafer at the beginning of the packaging process using a die sorter or, more likely, the die attach tool.

Final test, mark, inspection and loading into shipping media take place at the end of the process.

Most CSP processes, particularly wafer-level packaging, move the singulation and pick-and-place steps to follow final electrical test and mark, and seek to include final vision inspection and media loading into the pick-and-place process.

While embossed cavity tape (Figure 4) is the preferred shipping medium for many CSPs, JEDEC style matrix trays are also gaining popularity (Figure 5).

Vision Inspection

Additionally, the presence of solder bump interconnects, coupled with the unique damage inspection and gauging requirements of CSPs, often require a high-level automated vision inspection capability not traditionally found on pick-and-place tools.

This capability includes both 2D and 3D inspection of bumps, high-resolution (< 2µm) wafer-level defect inspection (Figure 6) and automated backside inspection, all taking place without serious degradation of the pick-and-place tool's throughput.

High-resolution wafer-level defect and bump inspection are available on many stand-alone inspection systems, but most of these process only unsawn wafers and cost as much (or more) than the die sorting tool itself.

Alliances and joint development efforts between members of the die sorting and high-resolution inspection segments have integrated these functions and generated a production-ready tool to meet this emerging need.

The result is a high-speed pick-and-place tool with features that include:

• High-resolution wafer-level defect inspection prior to pick. Defects such as scratches, contamination, metalization damage, resist and/or passivation defects, cracks, and edge chipping as small as 1.8 µm can be detected. Damaged devices, then, are not picked, but the wafer map is updated for later analysis and possible salvage.

• 2D and 3D inspection of interconnect bumps. 2D inspection evaluates bump features such as diameter, position and shape, in addition to looking for bump damage. 3D inspection adds bump height and co-planarity measurements to the mix.

Figure 5. Wafer-level CSPs being loaded into JEDEC matrix trays	Figure 6. Typical defects found during in situ inspection of die on wafer

If bump defects outside of specified tolerances are detected, the wafer map is updated and the part is not picked.

Conclusion

New packaging requirements associated with the rapidly growing optoelectronics and wafer-level packaging markets have created a demand for sophisticated pick-and-place equipment that combines the throughput and reliability of die sorting tools with the power of high resolution vision inspection systems.

Similarly, very small devices, coupled with increasingly stringent placement accuracy requirements in many tape and reel applications, have necessitated advances in basic pick-and-place technologies.

Joseph H. Johnson Mr. Johnson has served as president and CEO of Laurier Inc., [laurierinc.com] a manufacturer of fully automatic die sorting equipment, since 1986. Prior to joining Laurier, he was vice president of sales and marketing for Hadco Corp., which at the time was the world's largest PC board fabricator. Mr. Johnson spent the first 15 years of his career at GE, where he held several R&D, sales and marketing and general management posts. He is a graduate of the State University of New York, where he received a bachelor's degree in chemistry. [jjohnson@laurierinc.com]