September - October 1999
eMail the Editor
Test-Handler Makers Look at the Challenges Ahead
The growing popularity of CSPs has forced test-handler makers to invent new methods and/or adopt old techniques for accommodating the leadframe-free needs of these advanced packages.- By Ron Iscoff, Editor
Makers of semiconductor capital equipment must often feel that they are running on a treadmill in their efforts to keep up with the expanding applications demanded by users.
Count suppliers of test handlers within this group. They are faced with decreasing packaging sizes and the need to test sometimes at low speed, sometimes at high speed. The introduction of the Rambus-based DRAM has created a whole new wrinkle in the test-handler game in terms of speed and the number of steps.
Consider too that CSPs have forced new mechanical and thermal requirements on test handlers, because these smaller packages do not have a leadframe to dissipate the heat generated during test. Additionally, the test industry has been, and continues to be, mired in a desperate attempt to wring acceptable standards out of the several dozen makers of test handlers.
"The challenges for building test handlers for CSPs is one of unique mechanical and thermal requirements," says Bruce O'Connor, president of Aju Systems USA Inc., San Diego. Additionally, the coming of Rambus "has required that devices make two passes through the handler-one for functional test and one at extremely high speed."
The high prices of Rambus testers, O'Connor adds, have pushed the envelope of "minimum test times" and high sorting speeds. Rambus handlers are required to index the handling tray by as many as 16x, to allow for testing 4, 8, 16, 32 and 64 devices in parallel.
The mechanical requirements between a TSOP type II and CSP devices with 0.25-mm ball size make locating the devices a multistep process and "required a great deal of Swiss watch engineering," he notes.
The CNA/MPX handler, distributed by Aju Systems, is a joint Korean-Taiwanese development.
O'Connor says the handler offers many unique features, including a patented tray that closes like a book, enabling the tester to protect the device from damage. Tester docking is vertical, and there is no precising of the devices from the JEDEC tray to the handling tray, which saves time and makes the handler easier to use.
Handlers do not usually know the temperature of a CSP device. This temperature changes when you apply 1, 2 or 3 watts. The MPX handler, O'Connor, says, is the "only handler with spot heating and cooling, which is accomplished with a three-stage temperature control." Figure 1 shows the user tray transfer flow (UTT).
Meanwhile Advantest's new M6751A Dynamic Test Handler (Figure 2) boasts the industry's highest throughput: 4500 devices/hour when coupled with Advantest's T5591 Memory Test System. Advantest, according to VLSI Research, controls 32 percent of the worldwide handler market in both gravity-fed and pick-and-place categories.
Aetrium Inc., St. Paul, Minn., recently demonstrated what it terms "the industry's first dynamic temperature control system for IC test handler applications," the Aetrium Model DTX Engineering System (Figure 3).
The DTX, according to Aetrium, is the first of a full line of dynamic temperature control IC handlers that the company is developing for high-volume production uses. Unlike conventional handler designs, which employ a chamber to thermally condition ICs before and during test, the DTX uses Aetrium's proprietary conductive thermal technology. This technology monitors and controls the temperature of the ICs under test.
This unit will enable customers to test ICs, such as Direct Rambus DRAM devices, across the full range of temperature requirements in one pass, without having to take the IC out of the test socket.
John Pollock, Aetrium's vice president of product marketing, who co-chairs a SEMI standards committee for test handlers. Pollock admits that developing standards for test handling is a "nightmare." Pollock says he has been working for five or six years "trying to develop a standard for changeovers, throughput, etc." He says that will be a continuing problem as packages continue to proliferate.
Kent Blumenshine, product manager at Delta Design, San Diego, notes that CSPs, because of their small size and the assembly techniques employed, result in a package that's more fragile than conventional enclosures.Alignment
"Previous alignment methods using the body of the device prior to contact proved ineffective for CSPs," says Blumenshine. To be successful, new alignment and contacting strategies were required. "A strategy similar to that employed to align the device in the handler must be used in the contactor," he observes.
Delta Design offers several pick-and-place systems to test CSP packages for memory, logic and mixed signal applications. Systems range from -32 test site and from ambient to tri-temperature systems. Devices are loaded into the system in trays and are picked and inserted vertically into the contactors, then binned appropriately.
The Nitro-Flex (shown in Figure 4) is a 1-8 test site capability machine with throughput up to 2350 mph, tri-temperature from -60Á to +160ÁC and optionally will handle BGA packages.
Daymarc, like Delta Design, has operated under the Cohu Semiconductor Equipment Group, San Diego, since May 1998. Daymarc's Enterprise test handler (Figure 5) incorporates test-in-tray handling to achieve increased reliability.One Contact
Test-in-tray handling reduces device handling to one contact. Devices arrive at the enterprise in a standard outline JEDEC tray. A stack of trays is loaded in the input; the trays travel through the machine in the same horizontal plane and are automatically stacked at the output.
Since the tray serves as the transport medium through the machine, any handling of the devices by the enterprise handler is eliminated. The only point of contact is at the test site, where the tray is plunged into Daymarc's high-performance contactors.
Anton Kussmaul, product marketing manager for Multitest, Rosenheim, Germany, echos what many of his competitors believe are the major challenges: the constantly decreasing device size, the extreme demands on the contactors and new requirements to increase throughput while supplying a highly reliable machine.
"The real challenge is to spot new packages early, prepare solutions in advance and be ready for a custom design when it is required. For CSPs, each Multitest handler now consists of a standard base system and a custom design for the specific package," he says.
Even though the custom work takes longer than an off-the-shelf product, Kussmaul notes that, "The customer will not accept significantly longer delivery times than for traditional handling systems." He says Multitest can now react to package changes immediately.
"A good example is the Multitest Pick and Place handler MT9510 (Figure 6), where the design time for a new package variation is typically 2-5 days. From a technical point of view, the CSPs are not a new challenge, since QFPs with similar dimensions have existed for some time," he notes.
Another major consideration, says Kussmaul, is to design a handler so that it can be integrated into a production line. "This is something that must be considered early in the handler design process."
Given the rapid escalation of package types, not only within CSPs, but in traditional leadframe package types, as well, the future design requirements facing test-handler makers is not going to get easier in the predictable future.
Chip Scale Review o 7291 Coronado Drive, Suite 8 o San Jose, CA 95129 o Email: firstname.lastname@example.org
|© 1999 ChipScale REVIEW|