Wire Bonding Will Continue as the Dominant Interconnect Technology Although strong growth in semiconductor demand is forecast this year, an increasing need for higher performance and smaller form factors at lower cost will always be present. To illustrate this point, the Semiconductor Industry Associa-tion roadmap calls for a greater than fourfold increase in pin count and a 25 to 50 percent decrease in cost-per-pin between now and 2005. To keep IC manufacturers ahead of this, and their own roadmaps, chip and board-level assembly will continue to converge. In addition, much of the responsibility for the development of lower cost, Þner pitch interconnects and substrates will shift from OEMs and subcontractors to suppliers of assembly and packaging materials and equipment.
Wire bonding will continue as the dominant interconnect technology, with ball and wedge bond pad pitch mass production thresholds decreasing to 40 and 35 microns, respectively, by 2005. To meet these aggressive targets, wire bond fine pitch process development must include all aspects of equipment and materials optimization, from die attach through molding. Gradual displacement of wire bonding by flip-chip interconnect technology will occur mainly in applications which are form-factor and performance-driven. To deliver the benefits of ßip chip at affordable cost, assembly and packaging suppliers must combine the bumping process, underfill materials and die placement equipment into an integrated solution. CSPs represent the fastest growing assembly and packaging technology segment, due to their ability to provide high performance in a very dense form factor at low cost. CSPs are well-suited for wafer-level packaging, which represents the best opportunity for sustainable cost reduction. WLCSP implementation, however, is becoming very dependent on the co-development of equipment and materials by suppliers.-C. Scott Kulicke, Chairman and CEO, Kulicke & Soffa Industries Inc.
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