An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics January - February 2000 Email the editor

Aquiet revolution is underway in the miniature packaging world. While wafer-level packaging is in the spotlight, with great promises for size and cost reductions, a simpler package has moved into high volume production-seemingly overnight. It is the small, leadless package based on wire bonding and leadframe processes being produced by a number of companies today Microvia Substrates Not Needed These packages do not have the glamour that is associated with many new CSPs; no microvia substrates are required; no solder balls are attached, and no thin-Þlm redistribution is deposited and patterned. The only exciting thing about this package style is that it meets speciÞc assembly requirements at a reasonable cost.

By Robert Crowley Contributing Editor

These packages belong to the quad ßat no-lead (QfN) category. While there are a few ßavors, common package characteristics include die attach and wire bonding to a lead-frame strip, plastic overmolding and singulation to create a chip carrier with peripheral pads and an exposed die attach pad on the bottom.

Most of the assembly steps are identical to those used in producing the simplest of small outline plastic (SOP) packages.

Fujitsu was Þrst in this market with its bumped chip carrier (BCC++) package that employs a novel "sacrificial" leadframe and half-etching to create plated cavities for land pads and die attach pads.

Several other companies in Asia and North America have responded with leadless packages that retain the leadframe metal inside the package. Notable examples include Amkor's Micro Leadframe package and ASAT's plastic leadless chip carrier.

According to Dynacraft, etched QfN leadframes are priced by the unit area, not by the lead count, which results in manufacturing cost reductions due to the high density of these parts on the leadframe strips.

Fujitsu's Bump Chip Carrier++ Amkor's MicroLeadframe

The QFN-style package includes exposed die attach pads and peripheral bottom terminals. By eliminating the leads, the package footprint decreases by almost 40 percent. A 48-lead TQfP with a 7 mm body size occupies 81 square millimeters on the board, while the leadless QfN requires only 49 square millimeters. for this package size, the die attach pad is typically 5 mm x 5 mm. These leadless packages are ideal for 16- to 48-I/O devices.

Package features

An important feature of this package type is its exposed die attach pad. The pad can be soldered directly to the circuit board to provide an excellent thermal path from the chip.

If this land pad is grounded on the circuit board, then the package contains a ground-plane. Down bonding can be performed to connect ground pads directly on the chip to the grounded die pad for better electrical performance.

Combine this attribute with short wire bond lengths to the leadframe and small terminals on the package, and the result is a small package that offers improved electrical and thermal performance compared to TSSOPs.

A side beneÞt of the exposed die attach pad is that it helps anchor the device to the PC board and reduces the strain on solder joints, due to CTE mismatch.

The cellular phone industry has quickly adopted this leadless package for RF circuits in handsets. Production volumes are increasing quickly at a number of companies. Manufacturing productivity is improved by the smaller package size, and this makes the cost structure quite attractive when compared to TSSOPs.

Look for this package to replace TSSOPs and low-lead-count TQFPs in many applications, as the technology matures.