By Douglas J. Mathews, Amkor Technology Inc., Chandler, Arizona Because many variables influence the cost of an IC packaged for a Bluetooth* application, achieving a specific price target requires the designer to consider the choice of substrate, off-the-die circuitry and the assembly and test methodologies. (Figure 1 summarizes many of the major cost contributors.) For Bluetooth, and wireless systems in general, all of the components shown in the flowchart can affect performance and cost.
Assembly Methodology Designers may implement Bluetooth RFICs as either a packaged part, with the motherboard supporting the off-the-die circuitry, or as a modular System-in-Package (SiP) assembly. If the Bluetooth offering is a packaged RFIC, such as a power amplifier or intermediate-frequency down-converter, the package must be capable of sustaining high-frequency performance. Two keys to good RF performance are the maintenance of short wire bonds and lead lengths, to minimize inductance, and a good RF ground. Modular implementations may consist of an RFIC or an RFIC plus baseband processing chips. Generally, modules/ SiPs employ either land grid arrays (LGAs) or ball grid arrays (BGAs). Both package styles can take advantage of a strip assembly format for high-volume manufacturing. The package should be matched to the strip dimensions to accommodate the most units per strip. Dielectric Properties BGA packages can be realized in a variety of formats and substrates. Plastic ball grid arrays (PBGAs) are inexpensive, but the dielectric properties of their plastic overmolding should be carefully considered for its possible impact on RF performance. Although PBGA packages are normally wire bonded, they can also be manufactured with flip-chip technology. However, flip-chip-on-laminate requires an underfill to compensate for differences in the CTE between the laminate and the semiconductor chip. As with overmold, the presence of this additional dielectric material can impact circuit performance. Because of underfill, flip-chip assembly may not reduce package size. When underfill must be applied, additional space surrounding the die is usually required to accommodate the underfill nozzle. Additionally, depending upon the flip-chip interconnect scheme, routing signals from under the die can present challenges. Manufacturing Problems For example, designers must take care not to space flip-chip attach points so closely that they present manufacturing problems during die attach or restrict signal routing choices. When the Bluetooth SiP is to include discrete flash memory and/or separate RFIC and digital signal processing chips, the size of the package can grow rapidly. To minimize the package footprint if the required flash cannot be integrated on the DSP chip, the DSP chip can be stacked upon the flash chip or vice versa, depending on relative chip size (Figure 2).
Substrate Choices Different Bluetooth developers may select from a variety of substrates, including laminates, low-temperature co-fired ceramics (LTCCs) and glass. It is foreseeable that solutions integrating lower-cost laminates with IPNs (integrated passive networks built on glass or silicon for key passive implementations) are also likely to occur. For any package footprint, two-layer laminates are the least expensive substrate. However, relative to other choices, the laminate-based SiP is also likely to be the largest, with the greatest variance in linewidths, spacing and dielectric constant per unit. Fortunately, the Bluetooth specification is relatively tolerant, and can accommodate considerable variance.
Many Bluetooth modules currently under development employ LTCC substrates. LTCC's cost-effectiveness is related to its ability to embed passives within multiple layers of ceramic. Glass systems, too, are gaining popularity for wireless systems, though high-volume production (< 250,000 units/ week) has yet to be achieved. Glass and silicon are being used as IPN substrates where a variety of capacitors, resistors and planar inductors are being realized in a smaller space and with less variance than discrete components. However, due to their lack of through-hole capability, both glass and silicon require either wire bonding the substrate to another substrate, or an inverted BGA implementation (Figure 3). An inverted configuration is of particular benefit when you want to have an antenna embedded in the ceramic on one side of the SiP, with the interconnection points on the other side. On the other hand, a limiting factor of this type of package is that the overall height of any component cannot exceed the height of the solder ball, once reflowed. This factor may create issues for larger discrete passives, and may also require a hole in the board to accommodate over-height discrete components. In an inverted BGA, the balls must be routed to the outside of the substrate, thus increasing the module footprint. The greater the integration of the Bluetooth design at the RF level, the more likely that laminates may be used successfully. Even when off-the-die circuitry is required, laminates with more than two layers may be acceptable. Additional layers, however, bring additional cost. Test Considerations Requirements for testing Bluetooth modules will vary depending on the content of the package. The good news is that the Bluetooth standard provides for comprehensive self-testing for modules that incorporate a full implementation of the standard. Special test modes are defined in the Link Management Protocol that allow the unit under test to be put into a loopback mode to allow detailed testing of the RF and baseband functionality. These special test modes will allow conformance testing of burst timing and drift, bit error-rate, receiver dynamic range, and transmitter power control (if applicable). However, if the Bluetooth module encompasses only the baseband and RF sections, testing becomes somewhat more complicated. The tester must then provide all of the control signals and protocols. Bluetooth modules are being configured with both packaged and unpackaged die. Using packaged die, particularly for RF components, allows for pre-testing before assembly, which is a great advantage. The disadvantage of the packaged-die approach is the additional size and cost of the final module. For bare die, testing becomes problematic, due to the need to perform wafer probing to ensure die functionality for the RF portion. Aside from the RF portion, the probing must also exercise the digital functionality as well. For production testing, as with any RF part, the design of the interface between the unit under test and the tester will be critical. For high-volume manufacturing, high-throughput automated handling equipment will be essential.
Developers must invest considerable care in the design and selection of this equipment. The amount of metal in the immediate vicinity of the SiP must be minimized to reduce the impact on the device from a fields and waves perspective. The contactors used to connect the package to the test board must be a low-inductance type that is specifically designed for use with RF parts. On this type of contactor, the emphasis is on making the contact paths as short as possible. This generally requires a plunge-to-board part handler that inserts the modules into the test socket; handlers and contactors designed to clamp the contactor down on the package will not be acceptable. The impedance of the RF lines to the package must be carefully controlled in order to avoid power being reflected back and affecting module performance. Care must be taken on the analog and digital lines as well, to avoid introducing unwanted noise into the package. System Co-Design System design at the product, IC and module levels all impact the cost of a Bluetooth product. It is an established convention that some 80 percent of the cost of a product is determined during the first 20 percent of the development cycle. System and IC partitioning, substrate selection, passive implementation, as well as assembly and test methodology are major contributors to system cost. Accordingly, it is essential that the package system be considered up-front, preferably as the die is being designed.
Concurrent Engineering The most effective way to optimize the system to enable the Bluetooth market is through concurrent engineering, or co-design. Co-design recognizes that systems engineering is required at all levels: product, IC and substrate. For optimum cost and size, the package must be designed in parallel and interactively with the system and ICs. Supply chain management must also be considered. The day of the single die in a package is being eclipsed by the need to source and second-source all of the needed components comprising the SiP. A strong foundation in supply management is necessary to feed the extremely high volume chain that Bluetooth will establish.
*Bluetooth is a trademark of the Bluetooth Special Interest Group.
|
