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Current Issue
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging
January - February 2002

Backgrinding Technologies for Thin-Wafer Production

By Pat Halahan, Phil Marcoux and Frank Kretz, Tru-Si Technologies, Sunnyvale, Calif., and Dr. Tony Schraub, F.A. Schraub and Associates, San Luis Obispo, Calif.

For new, emerging applications that use thin and ultrathin die, wafer grinding remains the common thinning method. The grinding and post-grinding processes, however, expose the wafer to potential damage, requiring new techniques for handling paper-thin wafers.

Backgrinding is the conventional method for reducing Si wafers from their original thickness during chip fabrication to a diminished thickness suitable for final packaging of die after dicing.

Grinding is fast and produces excellent Total Thickness Variation (TTV) and surface finish. For new, emerging applications that use very thin and and ultra-thin die, grinding remains the common thinning method, but some process modifications and additional techniques are required.

This article discusses the state of thin-wafer grinding and the complementary technologies needed for grinding very thin wafers.

Wafers are thinned after device fabrication and passivation and before singulating into die for packaging. The wafer is ground very thin (making it very fragile) using diamond abrasive grinding wheels on rotary grinders.

Precisely Controlled Grinding Rate

Modern grinders rotate the wafer on a vacuum chuck and feed the rotating grind wheel into the backside of the wafer at a precisely controlled rate (or at a controlled force). The delicate grinding wheels employ graded diamond abrasives embedded in specially engineered binders on the wheel edge.

Today's production limit for grinding reduces wafers from an average starting thickness of 725 µm to as thin as 150 µm, although most thin-wafer production averages 250 µm.

Yield loss considerations from grinding and downstream processes (de-taping, for example) have made it very difficult to thin below 150 µm. Die cracking during assembly and life test have added to this limit.

Applications

Recent applications and packaging techniques for smart cards, flash memory and some stacked die applications for portable devices mandate that die be thinned to below 200 µm (8 mils or 0.008"). Moreover, emerging applications are driving thinning technology to produce "ultra-thin wafers," with a final thickness below 100 µm, and some as thin as 50 µm (2 mils).

A number of special manufacturing techniques are being attempted for making these ultrathin wafers, but with limited success. Normal grinding and post-processing techniques are still preferable.

Removing Damage

Thin and ultrathin die are difficult to handle and package. Additionally, thin die are flexible, so pick-and-place equipment requires tuning. Frame tapes may also have to be changed, and other processes may require adjustments to accommodate these ultrathin die.

One of the biggest issues confronting manufacturers is die cracking during bonding or life testing. Considerable analysis has determined that much of the cracking is due to die backside damage-often induced by the grinding process, which basically scratches away silicon using diamond bits.

This backgrinding causes weaknesses in the silicon wafer, in much the same way as cutting a pane of glass with a scribe-and-break technique.

Thus, new technology is required to remove surface or sub-surface damage (SSD) and/or stress in the production of thin and ultra thin die. Other requirements include special handling tools and related storage and shipment carriers for these thin wafers, as well as special thin-wafer grinding recipes.

The grinding process usually consists of two steps. First, a coarse abrasive wheel grind (typically ~350-500 grit diamond abrasive) removes material rapidly, but damages the surface by gouging the silicon away. Then, a fine abrasive wheel removes most of the grinding damage by a gentler grinding with fine abrasives (2000-3000 grit) using ductile grinding technology.

Figure 1. AFM photo shows the surface of a silicon wafer after a 500-grit grind step.

Figure 1 shows an AFM (atomic force microscope) picture of the surface of a silicon wafer after a 500-grit grind step, indicating considerable damage.

In Figure 2, the surface still exhibits residual damage following a 2000-grit grind. However, as Figure 3 demonstrates, some of the coarse grind damage remains even after fine grind.

Figure 2. Wafer surface still exhibits residual damage after a 2000-grit grind.

To further remove damage, repair edges and strengthen the wafers and die, post-grind, SSD removal is used as a third process step. At this point, thin and ultrathin wafers are strong enough for subsequent handling by special automation methods, and the wafer can be diced into die with enough strength for the intended application.

Figure 3. Even after a fine grind, some of the coarse grind damage remains.

Three methods are currently employed to remove grinding damage: traditional loose-abrasive polishing, wet etching and dry plasma etching. The table shows some of the different process characteristics.

 
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