The first method typically integrates a polishing step into the grinder itself, a method that offers the advantage of integrating the SSD removal into the grinder tool and builds upon traditional CMP (chemical-mechanical-polishing) technology. CMP, however, presents the disadvantage of low removal rates or high downforce requirements, which may damage very-thin wafers and "drive" the sub-surface damage further into the surface during the polishing process. The second method, wet etching, uses familiar wet etching processes to remove SSD. This spin-etching process provides uniform removal, but the edges of thin wafers are rendered sharper and more fragile. The third method uses atmospheric dry plasma etching to remove SSD. This method offers the advantage that the SSD is removed, the edges are improved by rounding the sharp edge, and the surface roughness can be controlled where needed for adhesion. (Figure 4 shows the backside surface after a dry-etch process. Figures 5 and 6 are SEMs illustrating pre- and post-etch wafers.) Controlling Damage The grinding of wafers to less than 200 µm thickness requires some special grinding process techniques. To begin with, the vertical grind forces are restricted to lower levels than on the more robust thick wafers. Lower grinding forces produce less SSD and improved edge quality.
The speed of rotation and feed rates must be carefully chosen. Additionally, since the wafers are thin and flexible, the edges-which tend to lift off the vacuum chuck during grinding by the fluid forces of the coolant and rotation-must be restrained to protect the already thin and sharp wafer edge from further thinning or chipping. Vulnerable Edge The standard semiconductor wafer presents a carefully shaped and ground rounded edge shape. However, when that wafer is thinned to less than half its original thickness, that rounded edge becomes razor sharp and especially vulnerable to chipping or indenting when it impacts any hard surface.
Special considerations to deal with sharp edges are required in the process flow, especially when wafers are rotated at high speeds, as in the common semiconductor cleaning technique of spin-rinse-dry. Figure 7 and 8 are SEMs of the edges of a thick wafer and a wafer that has been thinned, respectively. As the thickness decreases from around 250 µm, the wafer edge sharpens. Grinders are limited in the degree of thickness they can grind before the wafer edges begin to deteriorate. Figure 8 illustrates that when a 725 µm thick wafer is ground to about 100 µm, the edge is somewhere in the beveled section of the wafer. The resulting edge is chipped and the whole wafer can be easily broken. Figure 9 shows an optical image of a 100 µm thick ground wafer and the resulting edge damage. Removing edge damage has become a major objective for ultrathin, post-grind wafer processes. Dry etch processes, which don't affect the front of the wafer, are generally a better alternative for improving edge profiles.
Handling Challenges Traditional robotic end effectors and wafer carriers designed for thick wafers are not suitable for thin wafer handling. Internal grind stresses and/or applied films distort wafers so that they are no longer flat (measured as bow and warp). Ultrathin wafers may also sag due to their flexibility and gravity. Efforts are underway industry-wide to address the special handling methods and tools required to safely locate, handle and store thin wafers.
Summary The mature and proven techniques of back grinding silicon wafers for post-fabrication thinning are being modified with new methods to address the unique issues of thin and ultrathin wafer production. Changes in the grinding process have allowed grinders to thin wafers to as low as 150 µm. The move to ultrathin wafers, below 150 µm, however, will require other process steps to remove microscopic grinding damage. Additionally, new techniques for handling these paper-thin wafers are needed.
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