January - February 2003 The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging Email the editor

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By Karl R. Heiman, Chuck Heebner and Chris Taylor, Electroglas Inc., San Jose

A probe card is one of three main elements in a test cell. (Cascade Microtech)

The importance of wafer probing as a tool to lower the cost of test in the manufacturing process has grown dramatically in recent years due to the emergence of advanced device technologies and the increased need for higher productivity and process automation.

Despite those benefits, it may be unclear at times exactly what wafer probing involves and how its benefits are best achieved.

One reason for confusion may be that wafer probing is not a static, easily defined task. In fact, wafer probing requirements may vary greatly depending on the type of device being tested. Typically, each device has individual testing requirements ranging from probing accuracy and productivity to automation and bin coding.

Wafer probing is best viewed as a critical component of the "test cell," where devices on a wafer are tested to ensure functionality and yield.

The test cell works, at the simplest level, by a wafer prober system moving the wafer underneath a set of very small pins that electrically contact the device. These pins send electrical signals to test the device's performance.

The reality is more complex, of course. As equipment makers and manufacturers search for ways to achieve high accuracy, high throughput and low-cost test-and take advantage of emerging packaging technologies-new demands are being placed on wafer probing. These demands are leading to significant changes in equipment and processes.

Importance of the Test Cell

After a device has been manufactured in the front end of the fabrication process, it is critical that it be tested to ensure functionality before it is packaged and shipped to the end user.

This process significantly reduces the cost of packaging by not wasting resources on bad devices; it also ensures that end users receive fully functional devices with low-to-no failure rates.

To achieve that goal, devices are run through a test cell, which comprises three main components: the probe card (with pins that electrically touch the device I/Os to ensure they are working properly, as shown in the lead photo), the wafer prober tool (which accurately moves the wafer under the probe card), and the tester system (which runs the particular test the device requires for determining its functionality or performance.)

These different technologies, each typically manufactured by a different supplier, are combined to form the test cell. (A typical test process flow diagram is shown in Figure 1.)

Figure 1. Test process flow diagram

Where Does Wafer Probing Fit?

A core function of the test cell, wafer probing is the process of electrically testing a device while it is in the wafer form.

There are two basic forms of testing performed by wafer probers. One is the device electrical test, employed to test the functionality of the product and to sort good die from bad. This form may be a combination of continuity checks, device functional tests and/or output checks.

The second form is parametric testing, which is designed to assess a range of parameters-including critical dimensions, threshold voltage, resistance and leakage current-to improve the device fabrication process.

Figure 2. Fully automated wafer probing system

Parametric testing traditionally involves the verification of test structures during engineering design test of the device, but is also performed in production environments that require low electrical noise.

Wafer probing systems (Figure 2) must act quickly, accurately and reliably to ensure adequate test cell productivity regardless of the test method. That means numerous factors working in unison to achieve the best possible results.

Each of those factors is changing rapidly as device sizes shrink and productivity demands rise. (Figure 3 illustrates a typical test cell configuration.)

According to the ITRS 2001 Packaging Roadmap, leading-edge pitches for wire bond applications are currently at 35µm and will decrease to 20µm by 2005. At those device sizes, both probe cards and probers require extremely high accuracy to ensure that each probe contacts the bond pad.

Figure 3. Graphic shows a common test cell configuration.

This is just one example of how wafer probing and the technologies of the test cell are changing to deliver greater yields and higher throughput.

Probe Card Types and Trends

Figure 4. Advanced probe card contacts are needed for the smaller pitches between bond pads in today's complex devices. (FormFactor Inc.)

The immediate effect of the drive toward smaller pitches between bond pads and smaller bond pad areas has been the need for new fine-pitch probe card technology that can contact wafers with greater accuracy than previous generations. (Figure 4 shows advanced probe card contacts.)

The shrink in device sizes, however, is not the only factor driving the evolution of probe cards. A wide variety of productivity pressures require specific probe card technologies to meet the electrical test requirements of advanced manufacturing.

One of those factors is the drive to reduce testing costs. That trend has resulted in a desire among chipmakers to test multiple die at once, which lowers testing costs by increasing throughput and test cell productivity.

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