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January - February 2003
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging

Copper Flex Circuit Substrate Provides Good Heat Dissipation
David Francis and Linda Jardine
Contributing Editors

PATENT NUMBER: 6,462,274

ASSIGNEE: Amkor Technology Inc.

INVENTORS: Il Kwon Shim, Kyu Chang Kyu, Byung Joon Han, Vincent DiCaprio and Paul Hoffman

TITLE: Chip-Scale Semiconductor Package of the Fan-Out Type and Method of Manufacturing Such Packages

While CSPs result in a smaller footprint, the number of I/O that can be located within a chip's perimeter is largely limited by the size of the chip and the interconnect technology used.

As feature sizes decrease and chip functionality increases, more I/O are needed. For standard interconnections, the only way to get more I/O is to increase the substrate area beyond that of the chip perimeter.

One popular substrate material is copper polyimide film. While this material is adequately supported by the chip, it does not have sufficient strength when used beyond the chip's edge.

CSP with improved thermal properties and more I/O

Another trend is that of wafer-level packaging (WLP). With this approach, the chip is packaged while in wafer form. One problem with WLP is that substrates are attached to both good and bad die on the wafer. If the substrate is expensive or if the wafer yield is low, manufacturing costs may increase.

Increased chip functionality typically creates greater heat that must be dissipated from the CSP.

The Invention

This patent solves the problems mentioned by forming a stiff flex circuit substrate that can be extended beyond the perimeter of the chip (as shown in the illustration).

In its simplest configuration, the flex circuit substrate is fabricated with a layer of copper on the side, opposite the I/O leads. The substrate is sufficiently thick to provide the required stiffness to the portion of the flex extending beyond the edge of the chip.

As feature sizes decrease and chip functionality increases, more I/O are needed. For standard interconnections, the only way to get more I/O is to increase the substrate area beyond that of the chip perimeter.

In one variation, this copper support stiffener can be formed as an intrinsic part of the film. It can also be adhesively bonded to the film in a separate operation.

If improved heat dissipation is not a requirement, other materials can be used in place of the copper stiffener, including epoxy glass laminate, other organic substrate materials or ceramics.

If additional I/O are required, the substrate size can be expanded as needed. If additional stiffening is required, several methods can be employed.

In one approach, it appears that a bead of resin can be applied around the edge of the chip so that a resin fillet is formed between the extended substrate and the chip's edge.

If more support is required, or more heat is to be dissipated, a traditional window-frame type stiffener can be added. This stiffener can be made of copper, aluminum or ceramic filled polymer. It may also be desirable to provide an additional sealing step to enclose the gap between the chip and the added stiffener.

To further improve heat dissipation, or to provide additional environmental protection, a heat spreader or lid can be added to the backside of the chip and stiffener.

Summary

This patent describes a CSP substrate that can handle a larger number of I/O and increased thermal dissipation.

International Interconnection Intelligence is a market and technology research company specializing in the semiconductor packaging and interconnection areas. Contact David Francis or Linda Jardine by e-mail at iii1@ix.netcom.com or by phone at 650.726.1380. [iii1.com]

 
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