January - February 1999
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Chip-Scale Package Offers Cost Savings for Development of Cellular Video Conferencing
The selection of packaging for the imager die is a focal point for reducing the costs of optronic imaging devices.By Avner Badihi, ShellCase Ltd., Jerusalem, Israel
Abstract: The explosive growth of wireless communications in the 1990s has been driven, in large part, by technologies that have reduced both the cost and size of mobile communications products while providing endusers with additional connectivity options.
Today, the chief technical challenge for mobile telephony is to continue the integration of computing and cellular communications, so that early successes in this area expand to include multimedia, video-conferencing and higher-speed data transfer.
Achieving these goals requires that a foundation of relevant technology platforms be developed and coordinated.
Remarkably, the various elements needed to establish a video cellular phone network are now within reach, bringing the cost-effective deployment of a broad-based, multimedia cellular network closer to reality.
Critical enabling technologies in cellular imaging networks are nearing maturation. For this article, three components for the cellular imaging platform will be considered:
- The current wireless communications network infrastructure
- Low-cost imaging devices (imaging semiconductors and CMOS imagers)
- Optical chip-scale packages (CSPs) for CMOS and CCD imagers
Network Infrastructure
Full-scale implementation of cellular communications with multimedia applications will place stringent demands on the wireless infrastructure.Interestingly, the Global System for Mobile communications (GSM) standard that was developed to meet the mobile market's early aims seems to be in the best position to accommodate these new requirements.
Imaging Components
A new breed of solid-state imaging devices promises to dramatically reduce overall imaging system costs. Designed using standard CMOS technology, CMOS imagers offer die-level ease of integration and a system-level advantage over CCDs.In form, the CMOS imager is an array of photodiodes in which each pixel in the array incorporates a local amplifying element.
While conventional CCDs require significant power and a variety of input voltage levels (often in the 8-30V range), CMOS devices can be easily designed to draw only a small amount of power (0.01 to 0.04W) from a single low-voltage 3-5V power supply.
This reduction in the system's power budget again lowers costs and eases demands on a device's battery pack.
Optronic Chip-Scale Packaging
A variety of CSP packages for different applications is being produced using the ShellCase wafer-level process.
The adoption of CSPs for cellular communications products is being driven largely by size, weight and cost considerations.
With market share at stake, competition will force even greater cost reductions.
Wafer-scale CSPs used for the packaging of optical devices can realize the promise of die-size, ultra-thin, lightweight and low-cost packages. (A variety of ShellCase CSPs is shown in the photograph.)
The transparent ShellCase Opto-CSP, with a very small form factor versus a conventional LCC-type optronic package, is produced at the wafer level using standard semiconductor manufacturing processes.
Production costs of less than $1/optical package may be attained with this packaging technology. Additional savings are possible through wafer-level testing of the packaged devices and filter integration to further reduce the final product cost.
"Wafer-scale CSPs used for the packaging of optical devices can realize the promise of die-size, ultra-thin, lightweight and low-cost packages."
Manufacturing Process
The Optronic CSP manufacturing process uses thin film and related processes as an extension of the IC manufacturing process. Dies are packaged and encapsulated into separate enclosures while still in wafer form.The basic steps in this process are shown in Table 1.
Integrated Filter
The Opto-CSP reduces system-level cost and complexity through the integration of optical components (such as IR blocking filters) within the device.These spectral filters compensate for the different wavelength responses of the silicon detector and the human retina.
The filters compensate, for example, by filtering wavelengths detected by the silicon which are outside the range of human visual perception, i.e., in the UV and infrared portions of the spectrum.
Considerable cost savings can be achieved by integrating the filters at the wafer level.
These savings are achieved through a reduction in the number of optical components required and minimization of the required filter area. Depending on quantities and the CSP used, savings of $10-$20 for an 8-mm square die are possible with the filter alone.
| Table 1.Optronic CSP Manufacturing Process |
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| Table 2. Advantages of CSPs vs. Conventional Optronic Packaging |
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Summary
New imaging technologies offer low-cost approaches for the development of cellular video, multimedia and related applications.A chip-scale package for optical devices enables a reduction in both manufacturing costs and product size.
Assembly takes place at the wafer level as an extension of the IC manufacturing processes into the device packaging stage.
The ShellCase Opto-CSP offers advantages with respect to conventional optronic packaging and chip-scale packaging (as shown in Table 2.)
Mr. Badihi is vice president-technologies at ShellCase Ltd. He earned a master's degree in physics from the Hebrew University of Jerusalem. Prior to founding ShellCase, he spent more
than 12 years in management posts within the thin film and microelectronics industries. Readers may contact him at 888.870.7225, 972.2.678.8850 or by fax at 972.2.678.8850.