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Current Issue
An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics
March 2001

How Solder Bumping Can Maximize Ball Grid Array and Chip-Scale Package Yield

This article focuses on the relationship between yield, throughput, machine uptime and rework with a mathematical model that explains how these key factors affect both rework costs and overall solder ball placement productivity on the assembly line.

By Thomas W. Edwards, CAMALOT Division, Speedline Technologies, Haverhill, Mass.

The semiconductor industry hit an all-time sales and earnings record last year, with market growth predicted to exceed 1999 by more than 30%(1).

While focusing on getting product out the door and into the marketplace, it may be difficult, at times, to allocate the resources required to examine all aspects of an optimization process. Rework or repair of area array semiconductor packages may be just such an area.

Survey Responses Piqued My Interest

Concern for solder sphere placement systems and their impact on BGA/CSP package assembly, recently caused us to conduct an informal survey. "What do you think is more important in BGA (or CSP) package assembly," we asked. "Is it yield, throughput or machine uptime?"

Invariably, the driving concern was throughput, often followed by yield. When pressed further, users placed yield nearer to throughput in importance-rather than towards machine uptime.

Most people indicated that cost of ownership models are key issues, and items like depreciation of the bumping equipment play into that model. Cost of ownership was not necessarily weighted towards the purchase price of a piece of equipment; rather the cost of operating the equipment and how that cost affects production and subsequent unit costs were considered.

Frequently ignored or treated separately from the cost of ownership model, IC package rework costs significantly impact capacity, yield and total manufacturing cost.

Defective packages resulting from the solder sphere bumping process (sphere placement and reflow), can be reworked or treated as scrap, depending on the value of the parts or the user's business goals.

If core competencies tie in to mass production of BGA/CSP strips, is it wise (or cost effective) to separate these and repair them? What is the optimum path?

Area array I/O pitch continues to decline, allowing more and more packages per strip2. Without continued process improvement, yield losses can magnify challenges in product handling and treatment.

OK, So What Do We Look At?

This article focuses on the relationship between yield, throughput, machine uptime and rework. It does not deal with IC package value for scrap purposes, but instead examines the projected rework costs and the effect of the three key factors (throughput, yield and machine uptime) that affect them.

In setting up a mathematical model to explore the effects of these items, a few assumptions were made, based on industry information:

1. Package production yields are on the order of 99.52% and up to 99.97%.

2. Machine up-time estimates range from 80 to 100% for comparison purposes.

3. Throughput is on the order of 230 to 400 strips or units per hour (UPH) production.

4. A repair cost of $0.006 to 0.008 per bump per package is assumed (as provided by a package assembler and somewhat dependent upon exchange rate).

5. The operational period is 620 hours per month (a 24 hour, six day per week operation).

Before going farther, UPH is defined on a machine-by-machine basis in the cycle time to populate the entire strip with solder spheres. Sphere placement can be made at one time or in multiple placements, depending on the size of the substrate (and for some machines, the number of spheres to be placed).

Cycle times for a single placement can vary from about 8.5 seconds up to 30 or 40, depending on the configuration of the machine compared to the substrate. Some machines are also slowed in an attempt to boost yield for parts with pad pitches of 1.0 mm or less.

Another machine may operate more slowly for a strip operation, but lose no time when it comes to running smaller pitches for fine-pitch BGA or CSP applications.

This analysis treats each item (yield, throughput and machine uptime) independently of the others for a spreadsheet analysis to determine the effects of variations from one factor to the other.

Why Bother with This Evaluation?

The perception that existing yields and throughput rates for fine-pitch BGA- and CSP-style formats degrades when compared to those of the "old" standard BGA-style packages. Additionally, the growth of CSP and fine-pitch BGA packages drives the growing need to analyze the relationship of yield, versus throughput, versus machine uptime.

Looking at the following examples, you will quickly note the magnitude of the issue. For a package format of 5 devices per strip with 256 bumps per package, and a machine operating at a throughput of 240 UPH and at a 99.9% yield, the variations in rework cost can be projected as follows:

At 100% uptime:$18,285/year
At 95% uptime:$17,370/year
At 90% uptime:$16,456/year

But why read any farther? These numbers are not really worth considering. While these numbers may be insignificant in the overall scheme of IC package value, let's see what happens when we explore a little deeper. While we do that, why are my repair costs higher with higher throughput and uptime?

Effective Throughput

In performing this evaluation, effective throughput provides the appropriate modeling basis:

UPH * yield * machine uptime = EUPH

This formula yields a number that will be defined as EUPH (or effective throughput). Con-sidering a UPH of 1800 packages per hour, a yield of 99.97% and a machine uptime of 95%, the result would be an effective throughput of 1800 x 0.997 x 0.95 = 1705 package EUPH (see Figure 1).

The results are a throughput reduction of almost 5.3% and as much as 95 parts requiring either repair or discard as scrap. We assume that each defective part shows at least one defect. (Uptime must be considered over larger time periods, such as a month or a quarter. For the current analysis, however, uptime is modeled at an hourly level.)

Figure 1. Production yield vs. percent of uptime

At First, the Significance May Be Lost

It is obvious that decreases in yield produce increases in defective parts. It also stands to reason that if yield is constant, any increases in throughput and machine uptime will generate a great deal more rework than might otherwise be the case.

For any given yield and throughput, increases in machine uptime actually increase rework costs by allowing more production time for generating defective parts. As more good parts are created, so too, are more defective parts generated, as illustrated in Figure 2.

Figure 2. Changes in yield and throughput vs. uptime

Machine uptime is admittedly a tough proposition to weigh prior to owning a machine. Think back to the last time you spoke to someone about a particular automobile, perhaps one that you owned or currently own?

Ever run across the person who had the same model car, same year, same everything, but an experience that is virtually 180 degrees from your own?

The variations that occur in everyday items also occur in industrial equipment, even though we all strive to make those variations nil in the world of electronics. In a practical sense, machine uptime is difficult, if not impossible, to estimate in advance.

No manufacturer can predict what the exact uptime on a particular machine may or may not be, especially when the machine operators (akin to the different automobile drivers) also have an effect on the equipment.

For any given yield and uptime, increases in throughput cause proportionate increases in rework, as plotted in Figure 3.

Figure 3. Defect production vs. throughput

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