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March 2003
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging

Still Waiting for the Industry Recovery?
Dr. Tom Di Stefano
Senior Contributing Editor

Most of us have simply given up trying to predict a recovery. But in a sense, the recovery is already briskly underway-business in electronic components is booming in Shanghai, Dongguan and other hotspots on the Chinese Mainland.

Stoked by the availability of funding, tax incentives and a docile work force, electronics in China continues to grow in dollar terms despite double-digit price erosion.

The picture emerging at this point has become quite clear: Conventional packaging and interconnect have gone to China and they are not coming back. Deal with it! That business is a mature industry, with the expected thin gross margins and cutthroat competition.

The Next New Thing

Rather than look to the past, it's time to move on to the next new thing. Silicon Valley is a marvel in its ability to reinvent itself, and I have confidence that it will do so again.

According to Prof. Jim Gibbons of Stanford University, it is our willingness to take risks and to learn from our setbacks that makes us unique. By that measure, we have abundant opportunities for innovation and success in the present environment.

Opportunities are not advertised on the web-they must be ferreted out and nurtured to become the success stories of the future. Although they start small, it is the budding new technologies that underpin the next wave of business expansion. It is in the areas of upheaval and change that we find the seeds for growth.

Strong currents of change likely to spawn new growth segments in interconnect and packaging should be watched closely.

From modest beginnings as stacked-die memory modules for cell phones, systems in a package are growing rapidly to supply miniaturized building blocks for multi-media and wireless applications.

In addition to a proliferation of packaging innovations, SiP is creating needs for high performance designs, substrates, testing and thermal management. SiP is essentially a rebirth of the multi-chip module, but this time with CSPs and wafer-level packages that avoid the problems associated with known good die.

Conventional packaging and interconnect have gone to China and they are not coming back.

Emerging wafer-level packaging technologies show notable promise for restructuring back end operations, driven by compelling advantages in test, cycle time and cost.

A natural extension of chip-scale packaging, WLP reduced the package size to the ultimate, in response to demands for miniaturization.

Initially, WLP was little more than flip-chips dressed up as packages that could be tested and assembled with standard SMT equipment. From a base in small ICs for cell phone applications, WLP is expanding into higher-value applications.

Besides miniaturization, WLP offers the testable, mountable ICs needed for higher value applications. More broadly, WLP is an enabler for SiP because it solved the problems that plagued MCMs.

Micro-Vias Ignored

Another rapidly growing area, micro-via substrates, has been largely ignored in the US. While our PC board industry is in a free-fall collapse, Japanese suppliers strain to supply exploding demand for micro-via substrates.

This critical technology, needed for advanced SiP products, cannot be ignored.

In the broad view, emerging packaging technologies offer the potential to deliver on the promises made by MCMs a decade ago.

The benefits touted for MCMs are at least as important now as they were then. With emerging technologies such as micro-via substrates, WLP and system-in-chip designs, we have the practical means to fabricate and supply the broad market for modules.

Faced with this wealth of opportunities, there is no reason to look back wistfully.

Dr. Di Stefano is president of Decision Track Inc., San Jose, and an internationally recognized expert on CSPs and wafer-level packaging. [tom@decisiontrack.com]

 
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