![]() March 1998 eMail the Editor |
A High Performance Liquid Epoxy Encapsulant for Advanced Semiconductor PackagesNewly-developed packages housing high 1/0 chips have created a need for high-performance liquid encapsulants, such those recently developed and reviewed here.By K Mizuike K. Kanaji and T. Nishiguchi Nagase-CIBA Ltd., Tatsuni City, Japan
The key characteristics of epoxy encapsulants are high moisture resistance, good thermal shock resistance and low warpage, especially for packages using organic substrates. To achieve these requirements demands the selection of an epoxy resin and hardener with the appropriate chemical structure and with low-stress performance. Moisture ResistanceFigures 1 and 2 represent Tg and Young's Modulus change of a newly-developed system for potting with a new epoxy, hardener and SRA after PCT( 121 °C/ 100% R.H.) treatment. The newly-developed potting system shows good PCT resistance. It has no Young's Modulus drop after 1,000 hours. Tg dropped to 135 °C from 160 °C, but it is still higher than ambient temperature of 121 °C within the chamber, which indicates that it can protect the chip from water after 1,000 hours.Test MethodSince the actual packages employ various die attach material and organic substrates, which influence the moisture resistance of packages, we developed a simple test to eliminate these factors. The focus is limited to moisture resistance of pure epoxy alone for formulation screening purposes. The experiment was conducted as follows:Epoxy resin (25 x 25 x 2 mm) was potted on top of a special glass plate ( 15 x 15 mm) which simulates the silicon chip with a CTE of 6 ppm/°C and Young's Modulus of 12E9 Pa, as the test piece in Figure 3 shows. The test piece was first subjected to preconditioning at 85 °C/85% R.H. for various times, followed by IR reflow at 240 °C for 3 minutes, then checked for delamination. As shown in Table 3, the new epoxy system demonstrated a much better in the moisture resistance test, result compared to an available existing system. In our actual field test for various BGA applications, the new epoxy system met at least the Level 3 required by industry. Internal StressWe measured the internal stress of epoxy encapsulant by the strain gauge method shown in Figure 4. The steel ring and outer frame were placed on silicone rubber. The strain gauge (KFC-10-C-1, Kyouwa Electric Co. Ltd.) was attached onto the outer wall of the inner steel ring of 0.5 mm thickness using phenolic PC6 adhesive. The liquid epoxy was then potted in between the steel ring and the outer frame.After curing the epoxy resin at 160 °C for 1 hour, the outer frame and silicone rubber were removed. The cured epoxy, together with the inner steel ring and strain gauge, were then subjected to temperature changes from 200 °C to -70 °C with 1 °C/minute cooling rate. Internal stress was measured through the change of strain detected by the strain gauge. The internal stress can be calculated by using the following equation: ![]() Where
Figure 5 shows the internal stress of the new epoxy system with various filler loadings. While high filler loading reduces internal stress, the viscosity of encapsulant also increases. When filler loading is more than 60%, the liquid system shows a significant jump in viscosity (Figure 6). Substrate Board WarpageThe resin was potted with 25 x 25 x 1 mm thick on to a 30 x 30 x 0.5 mm BT substrate board without silicon chip and the resin was oven cured at 100 °C for 1 hour to and then at 150 °C for an additional hour. The warpage of the substrate board was measured on the diagonal direction. As indicated by Figure 8, the addition of SRA reduces the substrate warpage significantly. However, an optimum loading of SRA has to be sought to achieve low warpage, low internal stress and good adhesion to the substrate board.
Figure 1 - Tg Change after PCT (121 °C/100%R.H.)
Warpage vs. SRA ContentTable 1 represents the typical potting properties of the new system, while Table 3 shows the actual field results on representative packages using the newly-developed encapsulant.Underfill Resin for Flip ChipsThe flip-chip application requires good flowability of the underfill epoxy to fill up the micro-gap between substrate and the silicon chip uniformly and rapidly. As the micro-gap moves from 50-80 µm currently to below 30 µm, and the capillary effect is the only driving force for underfilling, thus the underfill epoxy have excellent flowability. The normal epoxy shows typical thixotropic flow properties, which has higher viscosity at lower shear rates. The newly-developed underfill material (Table 4) has dilatant flow behavior with a lower viscosity and lower shear rate which will facilitate the flow of epoxy into the micro-gaps during underfilling. Studies have shown that while the underfilling rate of the thixotropic flow into a gap of 80 µm is almost the same as the dilatant flow, the rate into the a gap of smaller than 50 µm becomes remarkably slow. Thus dilatant flow is advantageous in filling small gaps.
Figure 4 - Two-dimension casting model for strain gauge method.
ConclusionBy selecting the correct chemistry for epoxy resin, hardener and specially-designed stress release agents, the epoxy potting system can provide low stress, good moisture resistance and low warpage to meet today's requirements for advanced CDBGA and plastic BGA packages.The unique dilatant flow characteristic of the underfill epoxy helps penetrate into the micro-gap between the silicon chip and the substrate for flip-chip applications. The underfill epoxy also offers good moisture resistance, as designed for a potting epoxy. We believe that liquid epoxy encapsulants, developed by the techniques mentioned, can help boost new semiconductor packaging developments for advanced packaging applications. * Y. Shigeta, M. Ochi and M. Shimbo, "Shrinkage and Internal Stress During Curing of Epoxide Resins," J. Applied Polyimide Science, 26, pages 2265-2277, 1981. Mr. Katsuyuki Mizuike is team manager, ADP Team, Product Development Division at Nagase-CIBA Ltd. He earned a bachelor's degree in engineering from Kyoto University in 1982 and joined Nagase-CIBA after graduation. Mr. Kenji Kanaji earned a master's degree from Osaka University in 1991 and joined Nagase-CIBA after graduation. He is a member of the ADP Team, Product Development Division. Mr. Takahiro Nishiguchi is manager, ME Project Division at Nagase- CIBA Ltd. He graduated from Kyoto University with a bachelor's degree in engineering. Since he joined the company in 1977, he has been working on epoxy formulations for semiconductors.
|
Chip Scale Review o 7291 Coronado Drive, Suite 8 o San Jose, CA 95129 o Email: editor@chipscalereview.com
| © 1998 ChipScale REVIEW |