Media Kit
For advertisements and demographics
click here

On Line Reader Service
List of the sponsors with ChipLinks

 Publisher's Letter
One Day at a Time

 Assembly Lines
Mid-West Based Packaging Foundry, USTC, Specializing in Stacked ICs

 Opto-Electronically Speaking 
Dublin Company Boosting Laser Dicing

 On Test
Yes, There Are Final Test Opportunities in The Great Semiconductor Depression

 Industry News
Company News
Opto/Nanotechnology
Packaging Foundries
People in the News
Calendar of Events
Editorial Index

 Features
Bluetooth Packaging Test Challenges Pose Questions about Cost, Tools and Processing
Reach for the Sky! As Socket Choices Multiply in the GHz Range, Makers Face New Demands

International Directory of Test and Burn-in Socket Manufacturers

Funtional Socket Testing of 0.5mm Pitch µBGA Packages to Gigahertz Speeds

High Speed Connections for 40GHz and Beyond

Tutorial: How to Select the Best Stencil for SMT and Advanced IC Package Printing

International Directory of Stencil Printing Equipment Manufacturers

 Tools & Technologies
Optical Alignment Tool for Assembly and more...

 Patents
Semiconductor Bump Electrodes Offer Stress Dissipating Feature

 Archives
2003
Jan-Feb March April
2002
Jan-Feb Mar-Apr May-Jun
July Aug-Sep Oct
Nov-Dec    
2001
Jan-Feb March April
May-June July Aug-Sep
October Nov-Dec  
2000
Jan-Feb Mar-Apr May-June
July-Aug Sept-Oct Nov-Dec
1999
Jan-Feb Mar-Apr May-June
July-Aug Sept-Oct Nov-Dec
1998
  Mar-Apr May-June
July-Aug Sept-Oct Nov-Dec


Subscription
Free U.S. Subscription Form

 
April 2003
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging

Bluetooth Packaging Test Challenges Pose Questions about Cost, Tools and Processing
Information on products or services covered in this article Infomation on products or
services covered in this article

By Terrence E. Thompson, Senior Editor and Mareca Hatler, ON World, San Jose

Bluetooth poses a significant test cost challenge since test should not exceed 10 percent of the product cost. This article provides some background and insights on viable test strategies for wireless connectivity's newest hot potato.

What hath Blåtand (Bluetooth) wrought? Is this the answer to wireless connectivity or just a passing fancy of the consumer product industry?

Testing any RF packaged chip, including Bluetooth, can present unconventional challenges, because Bluetooth's gigahertz bandwidth RF and digital signals are not always testable at the wafer level.

Realistic RF results are obtained when the device is connected to its antenna-and the leadframe, package or substrate may be the antenna. Since a typical packaged Bluetooth chipset sells for about $5, and test costs should be less than ten percent of selling price, that means a $0.50 maximum test investment. Since mobile phones are one of the hottest Bluetooth applications, cost is certainly a key issue.

The Past

Bluetooth RFICs may be either packaged parts, with the motherboard supporting the off-the-die circuitry, or a modular system-in-package assembly*. Figure 1 illustrates key factors that contribute to the cost of Bluetooth modules.

Figure 1. Many factors, as this figure shows, contribute to the cost of Bluetooth. (Amkor Technology/Chip Scale Review.)

Antenna Included

Depending on RFIC structure and your choice for device plus product packaging and substrate, the package and product are likely part of the antenna system.

As Paul Sakamoto, CEO of Inovys Corp., Pleasanton, Calif., says, "It's very difficult to test Bluetooth at the wafer sort. In most cases, the RF is not functional at this point. You need it in a package or on a substrate to have the complete antenna." Sakamoto says that if budget is not a consideration (ha! ha!), then mixed signal ATE will certainly do the job.

Test Options

When compared to devices for other communications standards, Bluetooth silicon currently shows the highest level of device integration says John Lukez, product marketing manager at Credence Systems Corp., Fremont, Calif.

"True single-chip Bluetooth implementations contain everything from analog functions over DSPs and logic to RF all interfaced on the same chip. Due to the extremely high integration level, traditional parametric tests become difficult, since there is no direct access to the individual system building blocks," Lukez observes.

Special test modes are implemented where a connection can be made to certain spots within the system, but economics and package pin-count limitations make this approach impractical for high-volume production.

Lukez says engineers have two typical solutions. The most obvious is built-in self-test (BIST). This allows subsystems like oscillators, logic blocks and analog parts to test themselves with a small, on-chip logic overhead.

Real-World Usage

The alternative is to implement very realistic tests, imitating real-world usage by using actual signals. The assumption is that if the whole system is working, then the individual blocks are also working.

System tests, such as bit error rate (BER), under different conditions become very important. With the help of a huge waveform memory in the tester, the performance of the device can be tested under different scenarios like varying signal strength (fading), presence of interfering signals or especially difficult data sequences. Test systems with a huge waveform memory and the ability to use real-world signals are able to address these test challenges.

The Promise and the Problems

Despite the promise of adding Bluetooth functionality to a wide range of OEM products, testing can be tricky and costly, especially with packaged Bluetooth devices.

The difficulty with testing RF functionality at the wafer level is that compounded testers insert and measure RF and digital signals simultaneously, creating signal integrity issues.

As the wireless industry, in particular, pushes for higher levels of integration with SIP and MCM technologies, KGD testing of RF devices becomes challenging.

Because devices often present high packaging costs and potential lower yields, the cost of performing comprehensive wafer probe testing can be justified by the offsetting savings from less scrap at final test. Test integration blends disparate functional blocks that traditionally have been tested on dedicated RFIC and digital-logic test systems.

Requirements

Bluetooth module testing requirements vary with the chip strategy. If the device is a packaged RFIC, such as a power amplifier or intermediate-frequency down-converter, it must sustain high-frequency performance.

When digital clock rates exceed 1GHz, measurement techniques applicable to gigahertz-clock-rate digital designs differ significantly from those of gigahertz-rate carrier-frequency RF chips.

Modular Bluetooth implementations may have an RFIC or RFIC plus baseband processing chips. Although the Bluetooth standard provides for comprehensive self-test of modules with full implementation of the standard, if the module has only baseband and RF sections, testing becomes more complicated. The complexity is because the tester must provide all control signals and test protocols.

Bluetooth devices are available as packaged and bare die. Using packaged die, particularly for RF chips, permits pre-testing before assembly.

With bare die, testing becomes problematic since wafer probing must ensure die functionality for the RF portion. Aside from the RF portion, the probing must also exercise digital circuitry. For production testing, as with any RF part, the interface between the unit under test and the tester will be critical. For high-volume manufacturing, high-throughput automated handling equipment is essential.

 
Copyright © 2003