By Martin Paul, Kingpak Technology, Santa Clara, Calif. As independent providers of IC assembly manufacturing services, packaging foundries are expected to develop and assemble many packages in high volume for dozens of customers at low cost. You might call this "custom mass production," obviously a contradiction in terms. When installing capacity, we gamble on picking the outlines and specs that will have the highest usage. We try our best to gain commitments from customers-this in a business where contracts are rare. We risk holding the bag with under-utilized equipment and materials. Ultimately, packaging foundries are left with limited offerings, and the semiconductor assembly industry with fewer vendor choices. Chip-scale packaging is changing all that by truly enabling custom mass production. Known primarily for bringing us tiny IC package dimensions, CSPs also represent a huge leap in manufacturing, due to highly flexible substrate fabrication and productive assembly properties (Figure 1).
BGA substrates designed with EDA software and made from printed circuits are custom made quickly and with little investment. Matrix-array processing, common substrate-strip dimensions and the total elimination of external package leads have done away with inefficient dedicated mechanical processing, such as trim and form. The IC assembly backend can now operate with the same flexibility and package type independence as front-of line process steps like wire bonding. Batch-oriented material handling eliminates changeovers and improves output in both front and back. We now can run any number of different package sizes in the same production lines with only minor equipment setup changes. Would You Bet On It? Historically, a big part of capital spending plans are set for new packages with different body sizes, thicknesses, pincounts, lead lengths, etc. When you consider the cost of fixtures, magazines, molds, trim-and-form sets, dam-bar punches and shipping trays, the outlay can escalate into the millions of dollars. Unfortunately, all this expense does nothing to expand general production capacity with saw, die attach, wire bond, presses, plating or package marking equipment. You do not quickly forget making the commitment to pay for stamped leadframe tooling for a high leadcount QFP. These decisions might be reasonable for a memory or analog independent device manufacturer (IDM), with volume visibility, fewer packages in the mix and smaller package types. For a packaging foundry serving the semiconductor industry including the ASIC and logic IC markets with a vast range of high leadcount package types, however, making so many bets ultimately results in some big losses. Customers expect the supplier to make everything available, and competitors are often willing to make the bet to gain the customer's business. When thinking of mass production, we might think of economies of scale, such as where a big machine can replace the function of a number of small machines or workstations. However, most IC assembly processes are done on single units or in similar-sized batches, regardless of the size of the operation. CSP-Not Just a Tiny Package From a product and application perspective, the great benefits of chip-scale (near chip-size) packaging have to do with the packages themselves. Extremely small form factors, high performance and reliability, easy handling and processing through surface mounting-as well as low cost and wide availability-make CSPs the right choice for most new IC products. Chip-scale laminate packages (the TFBGA, for example) and chip-scale leadframe packages (QFN and similar) are quickly replacing long-established legacy packages, such as the PLCC, QFP, SOIC and TSOP. All types of semiconductor products from logic and memory, to analog, mixed signal and high frequency are now taking advantage of the CSP format. The Benefits In IC assembly, CSP production techniques provide a completely separate set of benefits, and the growth of CSPs has dramatically eased two of the greatest difficulties faced by packaging foundry operations. First, we can now create new packages of any body size and any leadcount within a wide range, without capital investments and lead times for tooling and equipment. There are no package-specific molds, and all lead cutting and finishing are eliminated. Gone, too, are stamped leadframes and die pad down-sets. Second, many productivity-killing equipment setups and changeovers have been eliminated from the assembly operation. From strip-index, magazine and heater-block adjustments in the front-of line, to die-set, press allocation and material-handling changes at the end-of line, common substrate dimensions across the entire package range allow immeasurable improvements in efficiency. If that were not enough, there's the added increase in throughput gained by using the matrix-array layout offered by most CSP substrates. Depending on the size of the package, there can be dozens or even hundreds of chips assembled on each laminate or leadframe strip (Figure 2).
Virtual Tooling With old package types like QFP and TSOP, package dimensions are defined by expensive, custom-made hard tooling like transfer molds, trim-and-form die sets and stamped leadframes. Introducing a new package for mass production may typically cost over $1 million and take up to six months. Today, most physical characteristics of CSP packages can be dictated by software. With chip-scale BGAs, for example, interconnects and pinouts are designed into PWB substrates, package leads are screen printed, re-flowed solder balls and finished packages are cut from dicing saw singulation machines.
All of these defining processes are configurable across the whole range of possible sizes and lead counts (Figure 3). For a few thousand dollars, and in a few weeks' time, we can develop tooling, build qualification lots and stand ready for high-volume orders of a complete new package type, specially designed for one customer's application. With chip-scale packaging, we can truly provide custom mass production.
|
Copyright © 2001