Socket Challenges for chip-scale packages

Design challenges for CSP sockets include electrical, mechanical and thermal issues.

by James A. Forster, Ph.D., Texas Instruments, Mansfield, Mass. for Chip-Scale Packages

The portability revolution in communications, computing and consumer products continues to drive the miniaturization of electronic packaging. Manufacturers are responding with a variety of solutions, including chip-scale or chip-size packages.

The choice of packaging options is increasing as each development in semiconductor technology brings new capabilities to the designers of consumer products. Olachea1 suggests that the number of packages doubles every six years and that the package designer now has a choice of more than 425 different packages. The significant advances made in the last two years in CSPs have resulted in the availability of more than 60 different package types within the category.

Intel's announcement of the adoption of Tessera's µBGA® for the packaging of flash memory,2 the commercialization of CSP technology in Sony's digital camcorder with more than 20 CSPs and Rockwell's GPS3 all demonstrate fast-paced adoption of this packaging format. Olachea, however has indicated that a major obstacle to the widespread adoption of any new packaging technology includes the availability of test support (sockets) and the overall price/cost of ownership-in other words, "infrastructure." According to Olachea, this will occur when the CSP can be purchased for less than $.01 per I/O. Lassen,4 at the beginning of 1997, indicated that CSPs were about twice the cost of an identical device packaged as an SOP. He believes that for lower I/O devices, CSPs will be at price parity within 3 years.

One of the requirements in the back-end processing of any package is burn-in. Today there are a variety of solutions for the burn-in of CSPs, with more than 20 companies5 developing or producing sockets specifically for CSPs. Standardization of the entire backend infrastructure has been highlighted6 as a key in the evolution of CSPs and the realization of low costs associated with mass production. Until then, the costs will remain relatively high ranging from $1 per pin to more than $20 per pin5; this is especially true for devices with pitches less than 0.75mm. A typical socket for the high-volume burn-in of a memory chip packaged in a TSOP can be purchased for less than $15. An equivalent socket for a 0.75 mm chip-scale package is currently priced at less than $40. These prices will come down as volumes increase and will be comparable to the cost of a TSOP socket.

Socket Design Challenges

The challenges of designing sockets for CSPs include mechanical, thermal and electrical issues. These must be resolved while minimizing costs and the space occupied by the socket so that the burn-in board density is maximized.

There is no single CSP outline, so the designer must accommodate a variety of CSP construction details as shown in Figure 1. This results in devices from different packaging houses being produced with the same I/O having different form factors, such as overall size and height. A 40-pin TSOP for a memory application will have a form factor that is defined by a JEDEC standard; this is not possible for the equivalent CSP. The outline of the CSP will be defined by the method of manufacture.

For example, in the Tessera µBGA technology, the die size dictates the overall package size. In an alternate method that uses a polyimide or ceramic carrier, the package outline is defined by the substrate size. The standards committees are focused on array geometries not package size. This means that sockets will be designed for a specific footprint and will have an interchangeable, custom insert or personalizer for a specific package.

The solder balls are small, 0.5 mm and less, and are typically made of the 63Sn/37Pb eutectic (the lowest melting point of all the solders). The design must ensure that the contact force is sufficient to break through the surface oxides and provide a reliable electrical connection, but not so great that at burn-in temperatures the contact force results in unacceptable damage to the ball. The material of choice for the contact in a burn-in socket is CDA-172, a beryllium-copper alloy. This material is the industry standard for high temperature applications due to its excellent formability, stress relaxation properties and conductivity. The specific hardness is selected based on the opposing needs of yield strength and formability. CDA-172 material can be plated with the any of the accepted materials (gold, nickel-boron, palladium or rhodium) depending on customer requirements.

For pitches of 0.8 mm there is adequate space to insert metal contacts, based on technologies which have been proven for BGA packages, with pitches of 1.27 mm. The problem is one of miniaturizing the contact and designing within the space constraints of the array geometry. For pitches of 0.75 mm and below a number of issues must be considered:

• A contact, small enough to fit within the geometric constraints;
• A contact with sufficient thickness and strength for the solder tail;
• The need to protect the contact tails from damage during handling and assembly;
• The need to "fan-out" the contact tails so that the socket can be easily mounted on a conventional through-hole circuit board;
• The requirement that there be no damage to the bottom of the solder ball.

A number of solutions for contacting the solder balls are available. For CSPs, these are normally zero insertion force and vary from custom sockets with manual insertion of the package to be tested, to clam shell design or open-top sockets made for high-volume production operations. Some of the concepts for contacting the balls are shown in figure 2.

An open-top design developed by Texas Instruments for 0.75 mm pitch CSPs has been adopted for high-volume manufacturing by a number of semiconductor suppliers. This socket employs a dual-beam or pinch-style contact, which touches the sides of the ball at multiple points above the "equator" as shown in the photo-micrograph of the contact in Figure 3. An advantage of this approach is that the contacts "hold" the CSP into the socket - no vertical load is applied to make contact. Consequently, there is no damage to the bottom of the ball and probe marks are avoided. This helps the vision systems to align and inspect the CSP during assembly by an end customer.

For ease of assembly, handling and strength, the minimum thickness of the contact material is 0.15 mm. In conventional sockets the spring material thickness is normally greater than 0.2 mm. To reduce damage to the contact tails due to handling during the manufacture of the burn-in board (BIB), a contact comb on the bottom of the socket is provided. This protects the tails and preserves their alignment for insertion into the BIB.

0.75 mm and below

A conventional approach using a "pinch" contact is possible for devices with pitches of 0.75 mm and above. The physical space limitations of arrays at pitches of 0.65 and 0.5 mm present a unique challenge. The space issue, shown schematically in Figure 4, illustrates the situation when the contacts are oriented parallel to the axis of the array and if they are oriented at 45° to the axis.

For a mechanical socket, considerations of the geometry indicate that, for pitches of 0.75 mm, the ball diameter must be less than 0.5 mm (0.020") to physically allow room for the contacts. Placing the axis of the contacts on a 45° angle to the axis of the array provides significantly more space to open the contacts and allow for variations in the size of the balls. The clearance between the contacts, when oriented as shown in Figure 4, for different pitches and different size balls, is presented in Table 1. If the contacts interfere with each other, the clearance in the table is negative. The benefit of orienting the contacts at 45° is clear.

This table would suggest that sockets for 0.5 mm pitch devices could be made using a conventional pinch contact if oriented at 45° to the axis of the array. However, the ability of the BIB supplier to supply boards at a reasonable cost with a through-hole pitch of 0.5 mm must be considered.

Some of the sockets for 0.5 mm CSPs are based on technology developed for known-good die and involve a carrier or substrate which fits into another socket. This is comparatively expensive and users continue to search for a lower cost solution. A key concern with this approach is the flattening of the bottom of the ball. A number of semiconductor manufacturers have stipulated that there can be no probe mark within a circular area 0.127 mm in diameter on the base of the ball.

Today, sockets are available for 0.5 mm pitch packages but they are considered expensive specialty items. For mass production, a contacting method will have to be utilized which fans out the pitch to 0.8 or 1.0 mm so that no additional cost is added to the BIB.

Wafer-level burn-in is a natural solution to this problem, but that seems unlikely in the near future for memory devices. While progress has been made in this area, there is still much to be done to develop a cost-effective, reliable and widely-accepted technique.

As an interim solution, some companies7 are considering the potential for the burn-in and testing of multiple units while the CSP is still in a strip or array format before being singulated from the tape. This is an interesting concept and this will be a pivotal year as socket manufactures develop solutions which will fit into the existing infrastructure.

Conclusions

Sockets are available today for the burn-in of CSPs. The prices are higher than sockets for established package formats, but that is normal and prices are expected to decline as volumes increase.

Cost-effective solutions for pitches of less than 0.75 mm are being developed, and a number of companies expect to announce production-worthy sockets during 1998. Regardless of the need for a uniform standard, the apparently insatiable consumer demand for increased functionality in a smaller form factor will drive the technology.

Levine8 dubs 1998 "The Year of the Chip-Scale Package" due to the potential this format exhibits. He references a forecast from Electronic Trend Publications that says the number of CSPs will increase from 105 million in 1997 to 419 million in 1998 (a 400% increase), and that by 2001 there will be 3.5 billion packages. With such tremendous market growth as an incentive, burn-in socket suppliers are working diligently to develop a cost-effective CSP solution.

References

• G. Olachea, "IC Packaging for the 21st Century," Electronic Packaging and Production, Vol. 37, No. 15, November 97, pp. 57-62.
• C. Wesselmann, "Intel Adopts µBGA in Push for CSPs," SMT, February 97, pp. 36.
• J. Vardamann, "Chip-Scale Packages: Cleared for Takeoff," Chip Scale Review, Vol. 1, No. 1, May 97, pp. 8-9.
• C. L. Lassen, "CSPs - Time to place your Bets," Advanced Packaging, January/February 97, pp. 17-20.
• R.T. Crowley, "Socket Technology: Meeting the Needs of Fine Pitch CSPs," Advancing Microelectronics, Vol.24, No. 6, November/December 97, pp. 21-23.
• N. Mclellan, et al., "CSP Reliability: Meeting the Challenges," Advanced Packaging, February 98, pp. 28- 31.
• Ken Jones, Private Communication, MicroModule Systems, Cupertino, Calif.
• B. Levine, "The Year of the Chip-Scale Package," Electronic News, January 5, 1998, pp. 62 & 67.

Dr. Forster is an Engineering Manget withing Texas Insteruments' Interconnecting Business unit. Contact him at 508.236.5259, fax 508.236.5339

or by email at jfoster@ti.com

Contact thinkness	Pitch (mm)	Ball (mm)	Dia. (mm)	Oriented (inch)	Parallel (mm)	Oriented@45 (inch)
0.203mm 0.008"	0.50	-0.1064	-0.004	0.225	0.009
	0.75	0.35	-0.0064	-0.0003	0.304	0.012
	0.75	0.30	0.0436	0.0017	0.354	0.014
	0.65	0.35	-0.1064	-0.0042	0.163	0.006
	0.65	0.30	-0.0564	0.0022	0.213	0.008
	0.50	0.30	-0.2064	-0.0081	0.001	0.000
	0.50	0.25	-0.1564	-0.0062	0.051	0.002
0.1524mm 0.006"	0.80	0.50	-0.0048	-0.0002	0.327	0.013
	0.75	0.35	0.952	0.0037	0.406	0.016
	0.75	0.30	0.1452	0.0057	0.456	0.018
	0.65	0.35	-0.0048	-.00002	0.264	0.010
	0.65	0.30	0.0452	0.0018	0.314	0.012
	0.50	0.30	-0.1048	-0.0041	0.102	0.004
	0.50	0.25	-0.0548	-0.0022	0.152	0.006