Packaging

In preparing my first column for Chip Scale Review, I was struck by what seemed to be the sudden appearance of articles on packaging in virtually everything that I picked up to read.

The word "packaging" has always been with us in electronics, but the meaning has shifted. Those making ICs have one concept, those building bare boards have another, and so do the assembly folks. Was I sensitized? You bet!

So now I embark upon a new journey to search once again for the silver chalice, the perfect package. But, alas, I learned that the perfect package is no package, at least not yet. The world seems to be in transition to array packaging. The quest for shrinkage goes on. Chip-scale packaging seems to be the obvious solution, but so much is missing.

You may ask, what is missing? Well letÍs start with infrastructure. Are the materials and processes available and suitable to allow the large scale ramp-up of chip-scale packaging? Not yet. Are there enough bare board or substrate makers out there that can produce the boards or interposers to make and mount chip-scale packages? Once again, not yet. Is the equipment available for manufacture, for test, for repair? If it is, how can it be improved?

Are there compatibility issues? Registration issues? What are they? How can they be resolved? Who is working on the solutions? Who is building infrastructure? Who is investing in the future?

Who is driving the next generation of packages? Where are companies responding? Will there be isolated individual breakthroughs?

Will advancements be the result of cooperative efforts? joint ventures? trade consortia, or government-supported programs?

Who will take the lead in building infrastructure? in fabrication? in assembly?

How many solutions will there be? Will de facto standards emerge?

Will we see a strong emergence of localized packaging powerhouses?

I am determined to try to find the answers to as many of these above questions as I canƒand more. During my travels to Asia and Europe, and while criss-crossing America for the remainder of the year, I will follow rumors of new packaging methods, new materials, new processes, new equipment, new facilities, the emergence of BGA facilities, the growth of infrastructure, the problems, the solutions, the interesting, the mundane, and the acceptance and growth of the chip-scale package.

I believe that we are at, as Andy Grove stated in Only the Paranoid Survive, a strategic inflection point in our industry that will forever change its profile.

They will drive new rationalizations and advances as we go beyond the BGA to the chip-scale package.

We will see new flexible substrates. We will see new methods of imaging. Our concept of making dielectrics conductive will change. Will we see a decline in supported laminates? Will build-up circuitry play a major role? Where will microvias fit in? How will they be formed? How will layer-to-layer registration issues be resolved? Will there be an increased trend to combine fabrication and assembly operations? Will the packaging function truly merge into one that is performed at a single site? Will this provide the drive and opportunity to bring about the end of joining materials that contain lead? Should it?

Are there areas or questions in which you have a particular interest?

Let me know.
Stay tuned.
Join me in this adventure.
We have a lot to discover together.

Mr. Weiner is Editor/Publisher of PAC/Asia Circuit News and a consultant to high technology companies. Contact him at 203.797.9103 or by fax at 203.797.9565. www.weiner-intl.com

By Gene Weiner
Contributing Editor