
May - June 1999
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Making a Safe Transition to High Density Substrates
By Gene Weiner, Contributing Editor
What does it take to get some HDI/microvia capacity in place on the ground in the U.S. in time to produce the §ood of parts expected to hit the marketplace by the first quarter of 2000?
How does one do it without a history of proven processes and procedures?
One printed circuit vice president of operations stated that he would like to get to the leading edge in production without passing through the bleeding edge phase.
Too many just do not make the transition "safely."
Capital Investment
Another PC board company's president stated that he would rather form a virtual business alliance with an Asian firm that has (or is) gambling tens of millions in capital investment on new equipment to produce CSP and BGA substrates.
Perhaps we should just emulate the more successful companies in Japan or Switzerland. Second to market may not be a bad position to be in.
Is a lack of confidence due to uncertainty? Is it because there are no global standards? Is it because there are no rational metrics for the substrates? Are they printed circuit boards? Or are they something else. Are they being measured and priced as PC boards? Perhaps they should not be. Connectors are priced by the "pin." ICs are tied to cost per function. Printed circuits are measured in cost per square inch. But is this proper for an organic packaging substrate that will mate with some form of CSP or BGA? I doubt it. Although similar, there are great disparities between the two.
One might compare the differences between photolithography in the printing business to that of making an IC or even a printed circuit.
Packaging substrates are often made by a combination of old and new materials as well as with old and specialized new equipment, e.g., FR-4 cores and liquid or dry film build-up materials to add insulating layers, followed by new techniques for adding conductors new hole forming equipment, materials, and processes, different weight and thickness requirements, and the list goes on.
The World Electronics Circuit Council (WECC) has taken the first step in creating a differentiating metric for packaging substrates.
It will evaluate the pricing metrics used in the electronics industry's supply chain and recommend uniform metrics for printed circuits and high density interconnects or "packaging substrates."
Is it time for integrated passives? How does one get the message out to the designers as to what is or will soon be available? One firm, Morton Electronic Materials, states that its new process can apply a resistive material to virtually any substrate while "dialing in" the resistance between 10 ohms and a megohm ±5%.
New Developments
There have been a number of interesting developments since my last column.
- Mitsubishi Electronics America's Electronic Device Group introduced a stacked chip scale package (S-CSP) that contains both §ash memory and low power SRAM.
- Five direct imaging systems with fine-line capabilities were introduced at IPC's PC Expo '98 in Long Beach, Calif., along with a more conventional photoresist exposure system that features an unconventional alignment system. The latter had cameras built into the exposure frame that provided front to back alignment of phototools of better than 10 microns in less than 1.5 seconds.
- TI decided to use Sheldahl's ViaThin tape ball grid array substrates (TBGA) in ASIC designs of 352 to 800 leads. Prototyping is under way with production scheduled for this summer. The substrate will be used in TI's Cavity-Down BGA (CD_*BGA) packages.
- Cypress semiconductor introduced a new line of complex programmable logic devices in fine-pitch ball grid array (FBGA) packages.
- Matra British Aerospace Dynamics has embarked on a microvia PC board qualification program involving BGAs with up to 625 I/Os and microvias formed by plasma.
- Micro Components Technology introduced its new Tapestry chip-scale and wafer-level Handler product line.
- RVSI/Vanguard Automation Inc. introduced a process line (system) for CSP ball attachment, including RDRAM and µBGA devices
Mr. Weiner is Editor & Publisher of PAC/Asia Circuit News and is also a consultant to high technology companies. Contact him at genehw@aol.com.
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