How easy is it to find the "perfect" IC packaging foundry for your chips? For the inexperienced, the road can be paved with hidden minefields. Let's look at a familiar (and frequent) scenario for many engineers who are responsible for packaging new, advanced semiconductors: It's a new product that a systems engineer is designing from the ground up. The design of the final product calls for advanced IC packages. These will require the enabling of RF/wireless connectivity for high-speed digital data transfer and video streaming. In addition, the package must have a smaller-than-CSP footprint, scaleable for future chip evolutions and capable of very high-density wire-bond interconnections. Conventional IC packaging will not support the system design parameters. Internal or External Vendor? Where does the packaging or assembly engineer find support-inside the company or outside? Which packaging foundry does the engineer choose? To make situations more interesting, the engineer is employed by a 6-month-old, fabless "start-up" and this is the first chip to debut! Maybe it isn't which foundry he chooses, but which foundry will choose his company. At the other end of the spectrum is the engineer who works for a multi-national company and has a very large "velvet" sledgehammer to leverage which of its packaging suppliers will be awarded the challenge. With more than 50 packaging foundries worldwide, you would certainly consider it to be a relatively easy task to select one that would align with the little start-up. Amazingly, it isn't as easy as that. It is actually easier to partner with a wafer fab supplier! Most of the packaging foundries have difficulty managing the uncertainty of a start-up, its low volumes and resource demands. Additionally, the amount of attention a start-up requires is significant. So how does a company of any size ascertain who or how a packaging foundry becomes a partner? The question is simple, the answer is less so. This article will cover several facets leading to sets of suggestions and considerations in answering this question.
Package Performance The costs associated with wafer (chip-level) integration and the reduction of line widths (lithography) demand reviewing the buried performance merits of IC packages. As gate (line) widths approach a theoretical "zero," shrinking chip lithography is fiscally prohibitive. Therefore, IC packaging is quickly becoming the focus of attention by designers, specifiers and systems engineers. The overall performance of semiconductors (transistor level) over the previous 40 years can be represented by a "hockey stick" graphic. The same is occurring with IC packaging. If we were to plot the IC package lifeline over the past 25+ years (especially with the latest advent in area array products) the same "hockey stick" image would result. Semiconductor designers and manufacturers have realized that untapped performance can be gained by squeezing at the package level without having to invest in multibillion-dollar wafer fabs. The result: Package designs, innovation, variations and proliferation are rampant. It's as though someone injected the packaging market with fertility drugs and growth hormones! Wireless Markets ICs, with their expanding abilities to support connectivity and portability, are increasingly catering to the RF and wireless markets. Most packaging firms offer little in the way of true RF parametric packages, operation or understanding. Only a very few understand the precise placement of die, wires and passives required to maintain consistent and continuous performance characteristics for high-speed digital or RF products. Therefore, it is imperative to understand the product support requirements, from a packaging perspective, when looking for an assembler. The largest packaging foundry is not necessarily the best fit for your company if it doesn't cater to your special requirements. To this end, most packaging firms will offer a current portfolio of mainstream BGAs and de-emphasize the "sunset" or "sunrise" packages and/or technologies. If your company has no need for a TO-92, metal can, ceramic or microwave package then your choice of packaging support is filtered to a simpler level. If, on the other hand, you only have a need for price competitive PBGAs and the volumes are respectable (100K per week or greater) then you can select from about a dozen packaging foundries.
Shrinking 'Half-life' Today, a package half-life has diminished from decades to years. The overwhelming requirement for IC packaging today is for mainstream packages (such as PBGAs, CSPs, QFPs, SOICs and-yes, still PDIPs). Advanced packaging schemes like flip-chip, modules, system-in-a-package (SIP) and wafer-scale are not the driving force for the present packaging supply/ demand model. Let's temper that statement a bit. We recognize that growth on the packaging horizon exists with advanced packaging technologies. As a result, the fabless company model, as well as large, vertically integrated companies, is often faced with establishing an internal packaging competency or outsourcing. Concerns Some of those concerns are the cost of investment, qualification timing, reliability prerequisites, continued capital requirements, market timing, obsolescence, and engineering/technical resources. Consider that it's only the top-tier packaging foundries who have the financial wherewithal and depth to spearhead and fund programs of emerging packages that require and consume considerable resources.
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