By Harvey S. Miller, Contributing Editor
Two springs of innovation emerged just about 32 years ago that have now widened into a mighty river of flip-chip developments so broad and so complex that it would take far more words than I have at my disposal to do them justice. However, my concentration here will be on two flip-chip sectors and their technology/market drivers:
The original motivations for flip-chip applications at Delco and IBM, the first flip-chip users, apply with even greater force today to mainstream electronics. At Delco, flip-chip offered high temperature, under-hood electronics reliability. At IBM, it was high-temperature mainframe computer use, with high-temperature reliability, plus circuit performance due to flip-chip's low inductance and low thermal resistance. A Heightened Level of Activity Adolescence in life cycles is marked by a heightened level of activity. Just look at the amount of flip-chip press (such as this article and articles in almost every semiconductor packaging magazine and conference), if you need further convincing of flip-chip's enormous economic and technological interest. Or check out the growing number of flip-chip service providers (Figures 1-4), many of which are included as an appendix to this article.
The attention of players in old and new materials and equipment segments has been captured by the potential that exists for flip-chip business. One group of these players is the flip-chip (usually at wafer level) bumping service companies listed in the table and discussed below. Opening Acts At GM's Delco Division (now Delphi Delco in Kokomo, Ind.), electronics began making its way under the hot hood (where the engine surface temperature was then 125°C, but is now 140°C) in the 1960s. Voltage regulators were a model application, but interconnection failures at the control IC wirebond connections forced a crash remedy program. That's how the world's first flip-chip became part of the 1969 Pontiac automobile. Delco's first flip-chip generation used an electroplated silver bump evaporated on a chromium/gold under-bump metallization (UBM) on the passivated die. (The bump was not reflowed.) IBM's Flip-Chip Precursor At IBM, the precursor to flip-chips were discrete copper balls embedded in little eutectic solder cups. These were introduced in 19641 as peripheral leads for transistor chips on ceramic substrate "hybrids." The modules on copper balls were the logic elements in IBM's 360, the computer system that initiated the mainframe era and propelled IBM to the top of the electronics industry. By 1970, IBM was ready to package the next monolithic generation and IBM's C4 flip-chip was born, an evolutionary but profoundly significant step. IBM designated the technology C4 for Controlled Collapse Chip Connection, which has become a generic term that lives on to describe a variety of solder bump technologies. Industry pundits have correctly pointed out that the flip-chip package was the first array, the first direct chip attach, the first surface mount and the first chip-scale package.(2) In the last 30+ years, flip-chip technology has attracted new captive and merchant efforts. Price and Performance Advantages "The two main causes of this accelerating growth rate are flip-chip's advantages in performance and price over alternative packaging, and the new materials, vendors, and techniques that now make flip-chip practical for many more applications," according to newsletter publisher and flip-chip expert George Riley.(3) Until rather recently, flip-chips were considered a higher-cost alternative to wire-bonding, but mainstream volumes have a magical effect toward reducing process cost. (A good analogy is the CMOS circuit scenario, where CMOS replaced NMOS and PMOS for less money.) Array configurations do require "redistribution," usually on-die, of I/O from peripheral to internal arrayed lands. That's how package (and die) size may be reduced by an order of magnitude, postponing IC pad-limiting barriers to denser packaging by several product generations. The Spotlight Shifts The search for more cost-effective, longer fatigue life led to Delco's third flip-chip generation in 1993, according to Delco's Mike Varnau. This generation employed a simplified UBM, sputtered Al, Ni, Cu, and solder paste deposition for bump formation. Today, Delphi Delco's merchant technology partner, the K&S Flip Chip Division, offers wafer redistribution and bumping services, and has licensed the technology to Amkor, ASE and National Semiconductor, among others. IBM's original C4 used evaporation for deposition of high-lead (95%) solder through a metal mask. The original idea4 was to provide differential melting temperatures; the board-level 63% Sn-37% Pb solder melts at 183°C while the flip-chip solder melts at 315°C.
The "discovery" by IBM of underfill,5 applied at the flip-chip to substrate level in the early 1990s, made the differential soldering temperatures unnecessary, since the flip-chip bumps are contained as isolated islands within a sea of underfill. Unofficial sources at IBM, who wish to remain anonymous, assure me that IBM is now electroplating solder. There are likely one or two reasons for IBM Microelectronics' reluctance to discuss its newer FC technology developments. 1. Lucrative licenses have been sold to AMD (and others) for the older technology. Moreover, the old technology capital base has long been paid off. It's been refined and optimized through the years. It works. 2. They aren't ready yet to go public with current flip-chip developments. Typically, IBM has a history of covering its internal and external bases completely before making announcements. Substrates for the High End Both IBM and Delco flip-chips continue to use ceramic substrate systems. Multi-layer ceramic continues to meet the high-reliability densification requirements for IBM's System 390 computers. Power-hungry ECL was replaced long ago by very fast CMOS, whose speed also translates into power and heat. Ceramic also works well under the hood for the same thermal and conducting reasons. (It also works well as cookware!) But the rest of the electronics industry needed a more cost-effective substrate, one with a lower dielectric constant for higher-speed circuits. One contender was IBM's glass ceramic Dk; pretty good at 5, but it is expensive. Organic Material The answer is organic, i.e., little printed circuit boards. These are produced en masse in 18" x 24" panels, and etched and drilled in volume. In their current embodiment, these little organic substrates use "build-up" technology to achieve 30 µm lines and spaces, and under 100 µm laser-drilled or photo-imaged vias, enabling escapes for 200 µm flip-chip-pitch ICs. The dielectric constant of the build-up is only 3. The leaders in this market area, the Japanese (followed by the Taiwanese), enjoyed over $1 billion in substrate business for flip-chip packages last year, according to industry consultant Dr. H. Nakahara.
|
Copyright © 2001