By Robert Lanzone, Unitive Advanced Semiconductor Packaging, Research Triangle Park, N.C.
The key constituent of wafer bumping is depositing the under-bump metallization (UBM), which has several purposes, including:
Today, the majority of the UBM systems employed are sputtered. Sputtering is considered the most cost-effective methodology for depositing the UBM, especially when compared to evaporation, because it is the UBM that most directly affects the reliability of the solder bump structure. Typically, the UBM must be able to survive many reflow procedures (often up to 20). As the UBM is the structure that adheres the solder bump to the pad metallization, it also must be able to endure both shear stress and tensile pull tests. A common criterion for solder failure during mechanical destructive testing is for the failure to occur within the solder itself. Therefore, the UBM must be very robust and not degrade appreciably with exposure to time, temperature, moisture and electrical bias.
Evaporation (C4) Evaporation technology has a large installed manufacturing and capitalization base. IBM invented the technology, and has employed it for high-volume production in its own processes, as well as those of its licensees (such as AMD and Motorola). A flow diagram for the evaporation process is illustrated in Figure 1. IBM employs an evaporated UBM with Cr, phased Cr/Cu, Cu, with a final flash of Au. This UBM structure, which is evaporated through a molybdenum shadow mask, has been demonstrated to be extremely reliable for high lead solders (97/3 & 95/5). This soft solder interconnect was originally deployed on ceramic substrates, but has also been utilized with a hybrid joint, uniting a high lead to eutectic join on organic substrates. Mask alignment is an important step in this process, and the mask must be designed with the TCE and the dynamics of changing temperature for the wafer in mind. The solder is also evaporated through these same metal masks. Since most of the solder is evaporated on the masks and chamber walls, this process can be extremely costly. This is especially true for expensive low alpha solders. The masks must be cleaned as the solder builds up on the metal mask. The cleaning process degrades the quality and opening of the mask, limiting its useful life. Multiple evaporators are required for the UBM and solder materials, resulting in a costly process. It is generally accepted that the area-array pitch limitation for evaporation is 225 µm. When application requirements approached 200 µm, practically all of the companies that originally deployed evaporation migrated to electroplating. Stencil Printing In the stencil printing process, the UBM is deposited over the entire face of the wafer using sputtering, including the metallized bonding pads. Typical UBM structures are Al/Ni-V/Cu; Ti/W/Cu or equivalent. A generic process flow for sputtered/stencil printing is illustrated in Figure 2. The solder is deposited using a stencil printing process. The stencil can be either metal masks or photo-defined.
The photo-defined methodology allows for tighter pitch, but still has limitations for very fine pitch. Yield issues are the predominant concern for fine pitch applications using screen printing. Stencil printing has other limitations for coarse pitch as well. Other issues occur during processing on thinned or brittle wafer materials such as Gallium Arsenside (GaAs), Indium Phosphide or other III-V compounds. Although stencil printing is generally considered to be the lower cost technology, due to its perceived ease of manufacturing for screen printing operations, this is not always the case. The stencils must be photo-defined as they are in electroplating. Screening and solder is not the most efficient use of materials. Another concern for screen printing (and a limiting factor for smaller, tighter pitch bumps) is the formation of voids in the solder bump. Since flux is required to be mixed in with the paste, the formation of voids in the reflow process must be monitored and controlled. Electroplating Electroplating is the most cost effective at the tightest pitch ranges since its yield is highest, small bump sizes are plated faster, and large bump densities amortize the cost over more bumps. This process offers the widest set of material choices and compositions of any of the deposition processes used today. It also offers the broadest range of bump sizes, pitches and patterns possible.
(A process flow utilized by the leading merchant provider of electroplating is illustrated in Figure 3.) The use of electro-deposition does require one modification to the list of functions that UBM must provide: Due to the nature of the process, it must also provide a layer for carrying the current necessary for material deposition. By virtue of this requirement, it is necessary that this layer be blanket deposited. In the first step of the process, a blanket UBM is deposited. A popular UBM for electroplating is Ti/Cu/Ni. These components serve very different purposes. For example, the Ti is for adhesion and sealing. The Cu is the current carrying layer, and the Ni serves as the diffusion barrier and wet-able layer. Solder Dam The UBM can be either evaporated or sputtered. As mentioned, sputtering is a lower-cost process and therefore is more generally used. A unique process employed for electroplating is the deposition of a solder dam.
The next step is to deposit and image the plating template. The primary requirement in controlling the solder volume is to use a thick resist with a well-controlled sidewall slope. A cross-section prior to plating is illustrated in Figure 4. Solder is plated within the entire volume of the defined structure by the template. This is generally referred to as standard plating, illustrated in Figure 5, and tight bump uniformity can be achieved for very small pitches (A photo illustration is presented in Figure 6). Solder pitches as low as 50 µm have been demonstrated with this methodology.
Plating Outside a Defined Structure "Mushroom" plating (which is shown in Figure 7), or plating outside of a defined structure, is somewhat less controllable than plating within a defined structure. This form of plating, however, allows for the creation of much taller solder bumps than standard plating allows, because the volume of solder deposited is greater. Once the material has been plated up in a uniform manner, the resist template may be stripped. Typically, the UBM will be etched at this point. A patented method to avoid this issue is to first perform a solder reflow. This is the reason for depositing a solder dam in the UBM process, so that the solder does not flow outward during this operation. The reason for reflowing at this step is to control (or eliminate) the undercutting that would normally occur with the use of the wet etching process. Undercutting can lead to loss of strength in the solder joint or may create variability of solder surface area, leading to reduced bump height coplanarity. During the reflow process, the solder is able to force conversion of the underlying metal into an intermetallic form. This intermetallic is insensitive to the etchants in use for the field metals and hence etching through to complete removal of the field areas may continue. A final reflow operation is performed post-etch to create a solder bump that is smooth and shiny in appearance. An example of a eutectic bump post-reflow is shown in Figure 6. Electroplating is the most scalable of all the technologies discussed to date. This is the predominant reason that companies such as major IDMs who originally instituted evaporation have migrated to electroplating. Essentially, if proper solder bath maintenance is performed, there is no waste, which is very important for higher cost, low alpha solder materials. Since no mechanical pressure is applied during the process, bumping on more brittle materials, such as GaAs or thinned silicon wafers is possible. A standard thickness specification for an 200 mm wafer is 18.0 mm. Electroplating has been demonstrated to create large solder bumps (~175 µm in height) to very small solder bumps (~25 µm). This versatility is advantageous for a merchant wafer bumping provider.
Summary The above three technologies are the dominant versions employed for flip-chip solder bumping. Each has its position and respective advantages within the marketplace. When choosing between these technologies, it is important to ensure that the technique will fill the user's current needs, while also meeting future requirements. It is vital to define your company's technology roadmap prior to selecting a particular technology. Roadmap items should include: wafer substrate materials, wafer thickness, wafer size, wafer pad metallization, wafer dielectric material, bump pitch, bump height, bump uniformity, bump material, and solder alpha emission rate, to name just a few. Electroplating has been proven to be the most cost-effective and versatile of the three technologies described here.
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