The International Magazine for Device and Wafer-Level Test, Assembly, and Packaging Addressing High-density Interconnection of Microelectronic IC's including 3D packages, MEMS, MOEMS, RF/Wireless, Optoelectronic and Other Wafer-fabricated Devices for the 21st Century

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Electronic Trends
Rising demand for flip chips is reflected in wafer bumping
Steve Berry and Sandra Winkler
Contributing Editors

As we discussed in our March column, the need for flip-chip interconnection is growing rapidly. Flip-chip interconnection requires, of course, that the die be bumped, resulting in an increased demand for bumping services.

Under-Bump Metallization

Solder bumping requires under-bump metallization (UBM) beneath the solder ball. There are multiple layers of the UBM, each with its own function.

The UBM is usually accomplished either by sputtering or through electroless-nickel deposition. Blanket film deposition is another method of applying the UBM.

The bump itself can be created by electroplating, solder paste printing/screening, stencil printing, solder jet printing or with preformed solder balls.

The attachment of preformed solder balls is fast and low cost, but is limited to bump diameters of approximately 200µm and above.

Solder paste printing is the dominant deposition method used at IC packaging foundries. Electroplated bumps allow for much finer pitches and better adhesion, although controlling the alloy deposition is challenging.

The Fraunhofer Institute for Reliability and Microintegration and the Technical University of Berlin, Research Center of Microperipheric Technologies, have developed a maskless bumping process for thin solder layers using an immersion soldering process (P. Gruber, D. Shih, et al., "Injection Molded Solder Technology for Pb-free Wafer Bumping," ECTC, 2004.)

Total Flip-Chip Forecast
(in Millions)
2004 2005 2006 2007 2008
Flip-Chip-in-Package 1,763 2,578 3,993 6,147 8,079
Flip Chip DCA 4,053 4,323 5,077 6,200 7,271
Total Flip Chip 5,816 6,901 9,069 12,347 15,350
(Source: ETP)

Immersion solder bumping is a cost-effective technology for creating thin solder caps on top of electroless nickel/gold under-bump metallization.

IBM has devised a new wafer-bumping technology that is especially suitable for lead-free applications (B. Pahl, T. Loeher, et al., "Ultra-thin Soldered Flip-Chip Inter-connections on Flexible Substrates," ECTC, 2004.)

Injection-molded solder (IMS) was developed to reduce wafer-bumping costs while addressing the conflicting demands of increasing wafer dimensions to 300mm and decreasing bump and pitch dimensions below 75µm on 150µm centers.

The IMS process uses a new head assembly that melts bulk solder alloys with precisely controlled compositions and dispenses the molten solder into multiple cavities of a wafer-sized mold plate.

The plate is CTE-matched to silicon and is reusable many times, thus reducing the per-wafer bumping cost.

In this process, a mold plate is scanned and filled with molten solder and inspected after solidification. Thereafter, the mold plate and device wafer are aligned and adjoined in a mirror-image fashion for processing through a solder reflow furnace to transfer solder to the wafer.

Demand for Flip Chip

ETP does not directly forecast the demand for wafer bumping; rather, we forecast the demand for flip-chip die. The table provides the total flip-chip forecast, both by package and by bare die.

High I/O applications include ASICs, FPGAs, microprocessors, system chipsets and graphics processors. The I/O range of these die extend to several thousand I/O. Low I/O applications for flip chip include RF devices, where the reduced parasitics and high performance of flip chip are essential.

In the middle I/O applications, many of the flip-chip devices are used for display drivers with TAB/TCP or flip-chip-on-glass interconnections.

Electronic Trend Publications (ETP), San Jose, is a market research firm specializing in all phases of electronics manufacturing, from wafer fabrication through final assembly. [electronictrendpubs.com]

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