Bonder and Tool Design Choices for CSPs

The CSP and flip-chip markets are among the highest growth segments of the semiconductor industry (Figure 1). They are expected to expand to more than 5 billion units by 2003, with over 4 billion of these wire bondable CSPs.

Three CSP designs dominate the marketplace: Texas Instruments' µStar, Fujitsu's MBGA and Tessera's µBGA package. The first two are wire-bondable, but the third requires a lead-bonding approach. All three, however, are produced using wire bonding equipment, bonding a single interconnect/cycle with a special-purpose tool. (The table lists the applications for each of these devices.)

The MBGA and the µSTAR BGA use conventional wire, bonded with the aid of sophisticated looping software and a special bottle-necked capillary that enables positioning the second bond very near the die edge.

The µBGA design is bonded using a modified wire bonder, called a lead bonder. Bonding is accomplished without wire and with a special tool, material handling system and software to control and manipulate the plated leads through a unique set of machine motions.

Figure 1. Total CSP production

Market Drivers

CSPs provide significant benefits to packaging design engineers. Their compact size (by definition, package dimensions are less than 1.2 x the dimension of the chip in the same direction) allows manufacturing smaller-form-factor products.

The short lead length and area-array mapping of the interposer provide superior electrical properties (inductance and capacitance) compared to conventional leadframe designs. The elastomeric layer absorbs the thermal contraction and expansion (TCE) mismatch between the die and the interposer (laminate or flex), resulting in a highly reliable thermal cycling capability during usage.

Flex tape can be "folded," enabling production of the smaller, lightweight products demanded by today's consumer electronics marketplace .

As shown in Figure 2, CSPs offer many of the packaging benefits of both flip chip and surface mount technology. Despite these benefits, chip-scale package wire- and lead-bonding processes pose numerous challenges not encountered during conventional device interconnection.

In spite of these issues, however, the technology remains competitive, because it delivers electrical performance and package size capabilities that other methods are unable to achieve. The ability to use wire bonding equipment, with its large existing infrastructure, ease of use, adaptability, and established reliability, is the most logical approach to CSP interconnect process development. As the infrastructure for CSP packages builds economy of scale, costs will be further reduced and economic competitiveness will be established.

Wire-Bondable CSPs

The two most popular interposer types for wire bondable CSPs are either flex (polyimide) or rigid BT laminate. Both choices require low temperature bonding, below the glass transition temperature (Tg) of the substrate.

Plating metallization for gold ball bonding is normally 1 oz. copper with 2.5-3 µm nickel and 0.5-1 µm soft gold without brightener additives. IPC-7841 provides an excellent description of the plating, but the gold thickness requirement of this specification is higher than normally needed for current production ball bonding applications. Plating for aluminum wedge bonding requires less gold thickness (0.1-0.2 µm), because the aluminum wire welds to the nickel layer after deforming through the gold. The thin layer of gold provides a passivation layer that protects the nickel from oxidation and provides a clean, bondable surface.

Visual Appearance

Brighteners are commonly used to improve the visual appearance of non-wire-bondable gold plating. Common brighteners are cobalt-based. These brighteners change the plated-surface properties, resulting in a smoother, shinier appearance. Unfortunately, they also change the mechanical properties, hardening the surface and changing its coefficient of friction significantly.

This effects the surface enough to make it unbondable; therefore, brighteners should be avoided for all wire-bonding applications.

Two types of plating processes are commonly used to plate fiex and laminate circuits: electroless and electrolytic. Electrolytic plating generally provides better bondability and is the plating method of choice. Electrolytic plating, however, requires connection of the galvanic cell to every portion of the circuit that requires metallic deposition.

Normally, for strip type laminate packages, such as plastic ball grid arrays (PBGAs), these current-carrying traces, used only to distribute the electroplating current, are located on the sections that are trimmed after bonding. The trimming disconnects the plated portion that would otherwise cause a short circuit during device usage.

Electroless plating does not require a galvanic circuit; therefore it does not require additional current distribution circuit traces and can achieve finer lines than electroplated circuits. Electroless processes are based on a chemical exchange reaction. Prior to electroless plating, the copper traces are pretreated with the exchange metal, commonly a zincate or palladium. The electroless nickel or subsequent gold bath then reacts with the pretreatment, exchanging nickel or gold for it. Electroless baths must be carefully controlled to avoid producing large grain sizes, which cause a rough surface.

When the surface roughness of the plating approaches the wire diameter in aspect ratio, it becomes difficult to wire bond. Wire bonding requires initial mating of the surfaces prior to bonding. Ultrasonic energy, applied through the bonding tool, enhances this mating by lowering the flow stress and Young's Modulus of the materials so that they can deform easily. When the local asperities are disproportionate, however, as is the case with a very rough electroless-plated surface, the materials do not mate and bonding is inhibited.

Chip-Scale Package Types
Type	Interposer (Interconnect)	Application
Flex Interposer
µSTAR®	Flex (wire)	Flash DRAM
µBGA®	Flex (lead)	Flash DRAM RDRAM SDRAM
Rigid Interposer
MBGA	Laminate (wire)	Flash DRAM RDRAM

Figure 2. Worked-loop CSP profile

Looping Profiles

Low wire loops and large downsets between the die and package are characteristics of wire bonded CSPs. To meet these challenges, special software algorithms have been developed for wire bonders. Figure 2 shows a special "worked" loop shape developed for CSP devices. The wire is approximately parallel to the die surface until the die edge, then drops abruptly towards the second bond.

The use of this shape not only eliminates edge shorts and meets bond pad pitch requirements, it also enhances thermal cycling reliability.

During thermal cycling, standard loop shapes flex in the heat affected zone (HAZ), which is located directly above the ball bond, and weaken. The worked loop, with its flat length and additional bend, flexes at the second bend (located outside the HAZ) during thermal cycling. This shape has been shown to be the most significant factor affecting reliability through a designed experiment (DOE) investigating thermal cycling life expectancy2.

Tool Requirements

In most CSPs, the second bond is very close to the die edge-within less than 10% of the overall length of the die-edge dimension. This proximity presents special tooling and bonding requirements. Figure 3 shows a drawing of the special capillary required for wire-bondable CSPs. The height of the bottle-neck region must be greater than normal, because the capillary cannot contact the die edge.

During their manufacture, capillaries are molded and pressed from a ceramic slurry around an internal-shaped pin. As a result, the bottle-neck section is thinner, and the additional height of this section results in a long, thin-walled region.

Some regions of a normal length, fine-pitch bottle-neck capillary may have wall thicknesses of less than 25 µm. The thinner walled CSP capillaries, however, present another, more difficult materials challenge. New high-strength materials, such as zirconia-toughened alumina, offer greater fracture resistance, resulting in significantly longer life.

Figure 3. CSP capillary requirements

Placement Accuracy

Capillary design has a significant impact on the success of a wire-bondable CSP process. For fine pitch bonding, the tip diameter is controlled by the die-bond pad pitch. The bond pad size is used, in conjunction with the required knowledge of the wire bonder's placement accuracy and ball size variation, to calculate the chamfer diameter required to produce a high shear strength ball bond. Another design feature, the face angle, produces a high-strength second bond.

The specification of a capillary with feature dimensions appropriate for a robust, fine-pitch wire bonding process has been well documented3.

The low temperature (125-150žC) bonding required by flex or laminate packages presents additional challenges. High frequency adaptive ultrasonic systems provide improved bond quality and are a requirement at these low bonding temperatures. Plasma cleaning of the substrates prior to bonding, and DOEs for process optimization, are mandatory4.

Lead-Bonded CSPs

Lead-bonded CSPs employ tape with a plated beamlead to interconnect the chip to the package. The wire bonder decouples the lead from the strip carrier. Typically, the lead is notched so that fracture location is controlled.

A special purpose tool, designed with flanges that grasp the lead edges, is used to fracture the lead at the notch and manipulate it both vertically and horizontally. This results in "dressing" the lead shape, positioning it on the bond pad, and then welding it to the pad.

Tools are available in several configurations with both grooved and dimpled tips. These features lock the lead and the tool together during bonding, providing better transfer of the ultrasonic energy. (Figure 4). The sidebar describes some of the most important tool features for CSP lead bonding.

Machine Trajectory

The bond head trajectory is critical to the CSP bonding process. The trajectory manipulates and controls the "dressed" shape of the lead, a critical factor in attaining thermal cycling reliability for lead-bonded packages.

The machine requires a higher level of control than a normal wire bonder to manipulate the leads properly. Additional control of the Z (vertical) axis is required. High resolution Z axis control allows higher velocities during the lead breaking; this, in turn, allows µBGA tape manufacturers to relax lead notch width tolerances-currently a manufacturing problem with µBGA tapes.

Pattern recognition determines the position of the die and the locations of all the bond pads. The bonder cuts the lead, the tool and machine motions manipulate and move the lead to the bond pad where it is bonded. Additional overstroke and height control motions that dress the lead, providing a smooth radius as it descends to the bond pad, are user programmable.

Another new wire bonder feature, dynamic bond height update, enables lead bonders to constantly update the bond heights. This allows the user to program very low lead breaking heights (the distance between the tool tip and die at the end of the breaking motion) for improved process capability.

Quality Tests

Several tests are commonly used to fine-tune CSP wire bonding processes for maximum throughput, yield and robustness. The three most frequently used tests are pull strength, deformation and visual inspection.

Pull Strength-Pull strength is tested using the same equipment as wire bonding. The hook is manipulated under the middle of the loop or lead length. A fixture is used to clamp and rotate the device so that the plane of the lead is perpendicular to the hook. As in wire bonding, the goal is to achieve the maximum pull strength with minimum variation. The shape of the loop can have a significant effect on the resolution of forces. In other words, low test values may be a result of geometry and not poor bond strength. Understanding the test geometry is a key factor in interpreting the results and setting production standards5.

Figure 4. Tool configurations for CSPs

Mid-span breaks are the obvious preferred mode; high pull strength lifts are a close second, though their variation is usually higher. Low strength lifts usually indicate pad-related problems, irregular gold plating of the leads or, sometimes, metalization peeling. Studies show that heel breaks result in future reliability problems; therefore, heel breaks should be minimized.

Because of the shape of the lead bond, a significant height differential and the short distance between the bond pad and the tape, it is common to fixture the package so that the tape and lead bond are rotated into the same plane. If the package profile requires a smaller diameter pull hook (to permit manipulation under the lead), the average number of mid-span breaks will be higher and the breaking strength value will be lower because the smaller radius acts as a notch.

Deformation-Control of lead deformation by the bonding tool is a key element in lead-bonding reliability. The depth of deformation is measured using a toolmaker's microscope with a high resolution Z axis measurement capability. Depth of the tool impression should range from 3-6 µm for high reliability, maximum strength and minimum heel cracking. Good gage repeatability and reliability (GGR&R) is required to assure that the microscope is capable of reliable, repeatable measurements.

Visual Inspection-a standard for lead shape has not been established. Visual criteria are therefore subjective and usually company-specific. Defects such as heel cracks and thin cross sections at the heel of the bond should be included in visual inspection criteria for the reasons discussed.

Conclusion

The growth of CSPs as an economically viable packaging alternative will depend on the development of a manufacturing and materials infrastructure capable of competing with other alternatives, including flip chip.

The use of wire bonding technology, equipment and tools enhances this development because of its ease of use and proven reliability. Availability of a substantial infrastructure of installed, upgradeable equipment and trained operators further advances the potential for growth. Nonetheless, further process enhancements, to achieve lower cost per lead, will be required to compete with other types of advanced packages.

References

1. IPC-SM-784, Institute for Interconnection and Packaging Electronic Circuits (IPC), Northbrook, Illinois.
2. P. Hoffman, et al., "Development of a High-Performance TQFP Package," Proc. of 1994 Electronic Components and Technology Conference, pp. 57-62.
3. L. Levine and M. Sheaffer, "Choosing the Correct Capillary Design for Fine Pitch, BGA Bonding," Solid State Technology, July 1999.
4. L. Christie et al., "Integrated Solutions to Bonding BGA Packages: Capillary, Wire and Machine Considerations," Semiconductor International, July 1998.
5. L. Levine and C. Enman, "Wire Bonding Strategies to Meet Thin Packaging Requirements, Part II," Solid State Technology, July 1993.

Mr. Levine received a bachelor's degree in metallurgy and materials science engineering from Lehigh University, Bethlehem, Pa. He is currently principal metallurgical engineer for Kulicke & Soffa Packaging Materials, Willow Grove. He has been granted four patents and has authored more than 18 publications. Prior to joining Kulicke & Soffa, Mr. Levine was senior development engineer at AMP Inc. and chief metallurgist at Hydrostatics Inc. Readers may contact him at llevine@kns.com, by phone at 215.784.6036, fax 215.784.6402. Mr. Hanoon received a bachelor's degree in mechanical engineering from the Technion (the Technical Institute of Israel). He is currently a senior process engineer in Willow Grove. Prior to joining the Willow Grove facility, Mr. Hanoon was a product engineer at Micro-Swiss Ltd., a Kulicke & Soffa company, where he specialized in bonding tool design, manufacturing and applications. Readers may contact him at ihanoon@kns.com, by phone at 215.784.6633, fax 215.659.7588.