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Current Issue
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging
August - September 2002

Skeptical about KGD? Relax, It's Better than Ever!
Information on products or services covered in this article Infomation on products or
services covered in this article

By Terrence E. Thompson, Senior Editor

Some new and very positive developments should encourage you to take another look at known good die. Better yet, the global IEC standards group is actually asking for user inputs before it is finalized.

Chip Supply SofTAB KGD process with assembled TAB unit in a carrier that can be socketed for standard test and burn-in. (Chip Supply)

Known good die are becoming essential for an increasing number of diverse applications. But, until recently, if you wanted to build products with KGD, you were never entirely certain that the KGD were indeed functional.

Relax, that uncertainty is fading fast as KGD users become more sophisticated, and more chipmakers become eager to let someone else handle the packaging.

Level of Quality Determined

Officially, KGD is "a qualification of a semi-conductor die which indicates that the die has been tested to a specified or determined level of quality or 'goodness.'"(1)

This IEC definition includes unpackaged bare and semi- (or completely) packaged die that have been tested and inspected at either the die or wafer level, and possess known performance parameters. KGD are increasingly becoming a commodity product that meets user reliability and functionality requirements.

This article will talk about KGD's future and also reviews some efforts by the Die Products Consortium to improve the support infrastructure for increased adoption of die products.

Get Your Die Here!

For years, IDMs were reluctant to offer "bare" die (KGD) for users to incorporate into few-chip packages or MCMs (Figure 1). Now some giants-AMD and TI, for example-offer KGD where performance matches their packaged ICs. There is also an abundance of KGD from leading, long-time KGD supplier National Semiconductor.

Issues remain, however, despite participation by the heavy hitters noted above In fact, historical assembly and test problems, some believe, have made prospects for more growth in the KGD area questionable. Without question, many few-chip and multichip packages will require KGD for cost-effective manufacturing. For example, Figure 1 shows stages in a microprocessor module.

Figure 1. Module with Power PC CPU and two cache RAM chips requires KGD for cost-effective manufacturing. The completed module with heatsink (left), de-lidded module (center) and bottom of completed module (right). (Chip Supply)

What Do You Think?

Huh? Most individuals in the electronics industry have minimal involvement with standards, other than trying to comply with them. But that has changed for KGD. Visit the Die Products Consortium website [dieproduct.com] and check out "The Role of Standardization." The DPC and IEC really do want to know what you think and what is actually needed before the standard is finalized.

Larry Gilg, Managing Director of the Die Products Consortium, says, "The die products industry is maturing to the point where many customers can obtain the die products they need at the right price, with the quality and reliability needed to assemble with confidence. The next hurdle to attack is the simplification of the procurement transaction itself."

Users of bare die require more information than users of packaged ICs to design, handle and assemble the die product correctly.

Minimum requirements for transfer of the unique, die-related information must be defined, stated simply in direct terms, and be defensible with data, says Gilg. That's why the IEC international standard is now being developed. This standard focuses on the unique information that must be available for successful application of die products in electronic assembly.

Collaborative Effort

The DPC is a collaborative effort by a group of microelectronics companies to enlarge the worldwide market for die products. Its members include Agilent Technologies, Amkor Technology, Analog Devices, August Technology, Chip Supply, IBM, Intel, LSI Logic, National Semicon-ductor and Texas Instruments.

Vote Early, Not Often

The complete draft version of the IEC Die Products Standard is currently out for review and is available for your feedback at the website.

What does the IEC want to know? Is your business a die supplier, die user or part of the infrastructure? Other questions probe your opinion of the requirement for a die supplier to disclose quality and reliability metrics on die products, how the lack of die product standards currently affects your business, and-perhaps most important-are there omissions from the proposed standard?

Caught in the Middle No More

Chip Supply Inc., of Florida, is the world's largest semiconductor die distributor and value-added die processor [chipsupply.com]. And KGD is one of the company's offerings. Jim Rates, director of advanced products, says that as a member of the Consortium, Chip Supply has participated for the last year or so in a project called "Test Methods."

The project's focus is to investigate methods usable at wafer probe to accelerate and identify die fabrication defects that contribute to "infant mortality" or early product death.

The problem for die going into packages and die being shipped as KGD is how to guarantee the performance when the tester is not fast enough.

The process uses voltage and temperature stresses along with unique data patterns to accelerate defects, and Iddq measurements to identify potential failures.

Figure 2. Die Pak test carrier plugs into burn-in sockets and provides electrical contact to bare die during final test and burn-in, prior to die packaging. (Aehr Test Systems)

Current data suggests that while not all defects can be screened out with this technique, the infant mortality population of certain CMOS fabrication processes can be reduced using variations of this technique. Figure 2 shows a Die Pak test carrier that plugs into burn-in sockets and provides electrical contact to bare die during final test and burn-in before the die have been packaged.

Rates adds, "On another front, we are now supplying CSP product that in many applications is a usable alternative to KGD. Chip Supply is also developing techniques that qualify as wafer-level CSP. This WS-CLP process is performed at the wafer level and is limited to low I/O devices such as memory and logic products."

The "packaged" product yielded by this technique is actual die size and test screenable in available sockets, similar to those used for standard packaged parts. If designed correctly, this technique also prevents die revisions (shrinks) from causing motherboard changes.

 
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