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The Next Big Thing? Move IC Interconnects to the PC Board!
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Terrence E. Thompson Senior Editor |
It must be true since I saw it in print! That's what at least one packaging journalist (not writing for this magazine) seems to have implied recently in an editorial.
The logic seems to be that IC packaging adds no value, so we should avoid it. He even suggests moving more internal IC interconnects to the board level! But I'll address that bottleneck in a moment.
Never mind that we've seen several hundred new IC packaging patents issued annually for the past five years (CSR even has a widely read column on patents in each issue, but that must be misguided thinking on our part despite strong reader interest).
Is Packaging Going Away?
Those patent-seeking folk must not have been told that packaging is going away, since it requires planning, money and time. And think about all of those unannounced packaging innovations that other companies did not bother to patent for whatever reasons.
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Squirrely marketing?
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I admit that the industry is now fascinated with wafer-level packaging, including UBM, redistribution and bumping technologies. But are these technologies suitable for every device? Not exactly.
WLP is great. It can dramatically reduce package costs for semiconductors, opto parts and MEMS devices. Additionally, it will be used more extensively and it has many potential applications-but it's not for everyone.
The WLP technology seems to be much more practical than the current System-on-a-Chip (SoC) frenzy. How many products have you seen that are just one SoC-no case, power and I/O jacks?
Even with a WLP SoC, what about power, displays, jacks, keys and the other components? If it isn't a monolithic product, we are still talking about putting parts together. Isn't that assembly and packaging? I rest my case (almost).
The semiconductor industry has been putting multiple devices in the same package for decades. I see no indication that the industry will change soon.
Does packaging have a future? Absolutely, and at every level from chips and discretes through final box builds. Engineering, not to mention basic science and R&D, all take time to implement. However, nothing moves faster than a squirrely idea in marketing. They don't have to build anything, so why worry?
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Does packaging have a future?
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Another magazine insists that photonics and MEMS producers haven't figured out how to manufacture, assemble and package their products.
I disagree with that contention, too. Some have a lot to learn from the electronics industry, but others are very sound and profitable companies with high wafer-level yields.
So what does this have to do with optoelectronics and MEMS? Plenty.
As the 21st century picks up speed, those in the high-tech sector will have to keep an open mind when it comes to manufacturing technologies. Opto and MEMS simply add photonic and mechanical functions on a nanoscale to the chip functionality that we depend on every day. Opto and MEMS, of course, need power and must interface with the dominant electronics infrastructure.
The Substrate Is the Problem
The wafer fab folk are refining ways to build single atom and single molecule transistors for a good reason.
The closer together the transistors are fabricated, the faster a circuit can operate. So why in the world would anyone want to move these fast interconnects to the board level where it would slow signals down?
At the June Peaks in Packaging conference, held in Whitefish, Mont., one WLP expert after another addressed how WLP is being held back at the moment by the lack of suitable substrates for handling bump pitches of less than 0.5 mm. This being the case, why move more interconnects to the problematic area?
Another point addressed at Whitefish was the "co-design" needed for chip and package designers. This is fine, but does not go far enough-you also need marketing to ask a few questions before committing manufacturing resources for some wild new product. You also need to break down design fiefdoms that fail to communicate.
The reason we have backend processing now is that wafer fab folk were, and are, obsessed with stuffing more and more into the IC without worrying about how that chip will interface with the rest of the circuit/product. That thinking may change someday.
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Single-atom transistor (Copyright Cornell University)
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Cornell Device Upsets Status Quo
Scientists at Cornell University's Center for Materials Research in Ithaca, N.Y., have created a single-atom transistor by implanting a "designer" molecule between two gold electrodes, or wires, to form a circuit.
The artist's conception below shows each molecule with a single cobalt atom (dark blue) held by pyridine molecular handles.
Sulfur atoms (red) anchor the molecule to gold electrodes.
These innovations, and other single atom or molecule transistors under development, will likely require new, innovative packaging.
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