This month issue An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics September - October 2000 Email the editor

Prof. C.P. Wong Contributing Editor

In the past, flip-chip interconnection was the province of the giant, vertically integrated OEMs, including HP, IBM, Lucent and Motorola. Recently, however, many smaller companies-as well as fabless semiconductor makers-have begun to explore this technology.

Flip-chip technology offers the advantage of high I/O density, due to an area array configuration that can accommodate in excess of 7,000 I/O. In fact, IBM's 1 GHz microprocessor, due to be announced this summer, will feature over 7,000 I/O.

Technology Benefits

In addition, the use of flip-chip interconnects provides other benefits, including:

• Short signal paths that enhance electrical performance

• A low interconnect profile due to small solder joint dimensions

• Mass interconnection yield during one reflow cycle that interconnects millions of joints during a single reflow process

• Excellent thermal management due to easy heat sink attachment from the back side of the device

• Low cost if all process parameters are optimized

Certainly, however, there are tradeoffs. These involve under-bump metallization (UBM), treatment of bare die, wafer bumping, substrate routing design, lack of known-good die, standards and the infrastructure.

Three critical components are needed to make flip-chip technology a success:

• Wafer bumping This includes UBM. Fortunately, there are many bumping houses emerging on the market.

• Substrate technology The consideration here is the feature size (line and space) difference between the IC and board technologies; in particular, the low-cost organic boards that have an order of feature size larger than ICs, are an issue. High-density interconnect PWBs are needed.

• Low-cost flip-chip assembly Com-ponent parts of the assembly process include substrate interconnect and under-filling processes.

Currently, there are at least seven types of interconnect processes employed with flip-chip on board.

1. Gold wire stud bonding uses wire bonds to interconnect the IC with the gold stud wire. A conductive paste or adhesive is printed on the substrate, and materials are reflowed (or cured) to form the flip-chip interconnect.

2. Polymer bump coated with gold is compressed to the nickel pad substrate. The polymer bumps provide excellent stress relief to the flip-chip package. The drawback is low-current density for the bumps.

3. Attachment of Tessera's µBGA with eutectic solder balls to the substrate. The elastomeric layer provides an excellent stress buffer.

4. The MCNC fluxless reactive gas process that interconnects the bumps to the substrate without using flux. As such, there is no flux cleaning process which, in turn, cuts costs. However, the use of reactive gas has some environmental concerns.

5. Using anisotropic conductive adhesives, either films or pastes that cure and shrink to interconnect the IC to the substrate, is a newer process that employs both pressure and heat. The limited current density restricts its use to low current density device interconnects, such as LCD driver chips.

6. Solder joint reflow on the eutectic, paste-printed surface of the PBW is the most common solder reflow process. High-lead solder joints are commonly used to ensure a proper standoff for reliability.

7. The Surface Activation Bonding (SAB) method, disclosed recently by Prof. T. Suga of Tokyo University, uses bumpless bonding. A reactive ion beam bombardment (or hydrogen radiation) is employed in a clean environment at ultrahigh vacuum, and bonding takes place at room temperature. The mechanism is the basic tribology bonding of two ultracleaned surfaces. Chemical and physical adhesion mechanisms are the driving forces of this process.

Adhesives Used

In addition to those noted, the use of adhesives alone to interconnect flip-chip on board is beginning to emerge, with the shrinkage of adhesive during cure forcing the interconnection.

In this area, Japanese companies are quite advanced, but few flip-chip packages are using this new and simple process.