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This month issue
An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics
September - October 2000
Email the editor
Publisher's Letter
A SEMICON West 2000 Perspective
Assembly Lines
Notes from the SEMICON West Floor/My Lunch with Scott Kulicke
Electronic Trends
New Method of Underfill Application for WLP Covers the Entire Wafer
Wafer-Level Watch
The Infrastructure Lags Wafer-Level Packaging for Complex Chips
Harvey Miller's Notebook
As Processors Reach Beyond 1 GHz, the Package Is the Gating Item
On Test
ATE Buying Decisions? Turn to the Tester Selection Trolls for Answers!
It's Academic
Is 'Design for the Environment' Strictly Academic
Flip-Chip Focus
As Flip-Chip Use Grows, the Processors Available Also Multiply
Industry News
SEMICON West: Still the Biggest (and the Best) Show in Town
More SEMICON West Photos
Company News
Calendar of Events
Editorial Calendar for 2001
Features
Reflow Ovens: Strong Growth Ahead, but Questions Surround No-Lead Solders
Singulation Trends: Automation and Integration Are the Order of the Day
An Expert Looks at the Issues: Dr. Ning-Cheng Lee on Solder
Technical Forum
How Strapping Operations Impact IC Tray Packaging
Acoustic Microscopes Provide a Unique CSP View
Technology Trends
Using Conductive Elastomer Sockets for High-Speed Chip-Scale Packages
Test Spotlight
STATS Adds High-End RF Test Equipment for Frequencies Up to 6 GHz
Tools & Technologies
Asymtek Introduces New Dispensing System and more...
Literature Review
Patents
Low-Cost Land Grid Array CSP for Solder-Bumped Flip Chips
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