September 1998
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Strip Assembly Attachment of Solid Core Balls for CSPs
By Dr. Rao Mahidhara, Vern Solberg, Wael Zohni, and Joseph FjelstadFor nearly 50 years, countless scientists and engineers worldwide have fueled all their creative energies to bring about an electronics revolution that continues today. The rate of change seems to be accelerating and there are no clear signs of abatement anytime soon. One technology that has stirred a lot of interest within the electronics community has been the chip-scale package (CSP). CSPs have arrived and have rapidly developed into a key-enabling technology for a number of highly miniaturized products around the world, such as cellular phones, camcorders and flash memory cards.
The development of the chip-scale package is based on the need for a packaging technology that addresses the new era of miniaturized, highly functional consumer and portable products. These minimalist packages have small form factors and appear to meet an extraordinary range of near and long term requirements for electronic packaging for the average assembler. This has culminated into a mad rush to invent and employ these packages in a wide range of products. The new packages are grouped into four different types: flexible interposer, rigid interposer, leadframe and waferscale. Both peripheral and area array packages are being offered. While peripheral leaded devices are sharing attention for low lead counts with area array packaging, most of the current emphasis is on memory (and higher lead count devices) which have been conceded to the area array package. CSPs are used primarily in products where portability demands small size and dense interconnects. Digital camcorders, portable phones, note-book computers and memory cards are just few of the commercially available CSP-containing products that are made by a number of companies such as Fujitsu, Panasonic, Sharp and Sony, to name a few.
The industry for CSPs has grown considerably since the first packages were introduced several years ago. Currently, more than 600 CSPs have been described (according to recent EIAJ/JEDEC surveys), but only a very limited number are in volume production and in use by various OEMs and contract assemblers. The production of CSPs is expected to grow at a compound annual growth rate of near 100% over the next four years. The total production of CSPs is expected to reach almost 3.5 billion units by 2001.
The Importance of CSP Package Construction
One of the leading CSP packages is the µBGA package. It has been chosen as the benchmark package by Rambus, Inc. for RDRAM and has become the standard for flash memory. One of the most attractive features of the package is its unique construction, which decouples the stress of CTE mismatch between silicon and FR-4 laminates used for PC Boards1. The combination of elastomeric materials and polyimide film used in the construction of the Tessera µBGA¬ package allows the package to absorb the flexure of dissimilar materials. The base material for the device structure is a high-grade polyimide film that includes the circuit interface between the die bond site and the ball contact. A pure gold electrodeposit is plated onto a copper base metal to ensure that a reliable bond is maintained (see Figure 1). To isolate the attachment area of the µBGA package from the unyielding silicon die, a thin elastomeric dielectric is incorporated to furnish a compliant system of materials.The resulting package structure absorbs all of the expansion and shrinkage associated with common PC Board materials, relieving stress on the solder ball, the package, as well as, the interface between package and PC Board surface.
As stated earlier, a number of alternative packages has been developed that meet the dimensional criteria for the chip-scale package; however, most of these have adapted a rigid plastic or ceramic interposer structure. CSPs fabricated using a rigid or very thin flex circuit with rigid die attach as an interposer rely on the elasticity of the solder ball for absorbing material mismatch.
Figure 1. Tessera µBGA¬ package uses a unique system of compliant materials to absorb physical stress between the silicon die and PCB materials making the use and benefit of solid core balls possible.
As a result, these devices may not be suitable for attachment to conventional laminated circuit structures without resorting to post-solder process epoxy underfill. The underfill is needed because operating temperature excursions cannot be absorbed equally between dissimilar materials, without transferring a majority of physical stress to the solder connection between the contact sphere and package, as well as the attachment site on the PC Board.
Production Issues
It should come as no surprise that there are nearly as many methods of CSP manufacture as there are CSP types. Many of these innovations may be suitable for specific environmental conditions or product applications. However, the materials and methods used in manufacturing the package will significantly influence the mechanical performance of the packaged die for the broader market applications. One area of special focus, common to all CSPs, is finding efficient and reliable methods and processes for the attachment of the contact spheres used for the mechanical and electrical interface of the package to a conventional PC Board structure. This seemingly simple task is deemed critical to cost-effective manufacture, test and rework of CSPs. Moreover, it is anticipated that it will become increasingly important that such spheres be non-melting at normal soldering temperatures and, further, that they not plastically deform during test and burn in.The array package has gained wide acceptance by the SMT industry due to its higher assembly process yield. In addition, board design and layout engineers have steadily increased the percentage of usable circuit board real estate by using area array packages. In the process, the designs are achieving higher component density, as well as improving overall electrical performance. Even so, greater component density and better performance is possible when the array contact and package outline is reduced to a form factor nearer to the size of the silicon die. When compared to the plastic TSOP type of device the component density of a chip-size µBGA has the clear advantage.
Adapting the same general strip-like format and magazine-to-magazine handling used in standard chip assembly, Tessera engineers developed a matrix assembly structure using 35 mm wide flexible polyimide film (or tape). After cutting the flex tape into 100 mm sections, the tape strip was attached to a carrier frame transport. The carrier frames are furnished with dimensions matching standard magazine enclosures and include index features for various process steps.
Although adapting the smaller chip-scale devices may enable a more efficient finished product size, enhanced electrical performance can be a favorable benefit as well. However, if the CSP product is to be implemented in high volume, several issues must be addressed before a reliable finished product or manufacturing process can be planned or developed.
One of the first areas of concern is making certain the CSP configuration can be efficiently manufactured using existing package-assembly methodology. In addition, one must consider the extent to which suppliers worldwide can build an infrastructure for supporting materials, equipment and service. For example, the traditional method for high volume leadframe-type IC packaging employs a configuration furnishing several die attachment sites in a strip-like format. Strip frames are prepared in a uniform width and length enabling efficient transfer from one process machine to another.
Figure 2. Cross sections of solder, thickly but uniformly coated on to copper spheres. Uniformity, while less than ideal for socketing, is satisfactory in meeting burn-in requirements
Solder Ball Assembly
Solder ball assembly of CSPs in the strip format follows the conventions of common practice with some minor modifications based on the unique challenges of CSP manufacture. There are four basic process steps in a typical solder or solder coated solid core ball attachment process: 1) Flux deposit at each contact site 2) Sphere alignment and placement 3) Solid core solder ball reflow attach 4) Defluxing and cleaning.A more detailed examination of these process steps is warranted.
Flux Deposition
Although flux is employed for the normal functions of metal cleaning, reducing surface tension and promoting wetting, its most important solder ball process function may be to hold the solder ball in position from the time of solder ball placement until reflow is accomplished. Selecting the most efficient method for flux application on the µBGA strip format, however, proved to be a process of elimination. The pin-transfer method, for example, although widely used technique for liquidus material application, did not provide a uniform flux volume at the ball attachment sites. Syringe dispense was eliminated, as well, because of excessive process time. Dipping, spraying and roller coating were disqualified because of the probability of adjacent solder balls melting together.Screen-printing has proven to yield the most uniform results, depositing a 20 µm-thick pattern of flux on each ball attachment site. It was found that using a flux with high adhesive properties adequately holds the solder sphere in position throughout the reflow solder process. Note: The minimum solder land pattern diameter recommended for the 0.50 mm array pitch device is 0.2mm while 0.25 and 0.30 mm diameter land patterns are most common.
Solid Solder Contact Application
Solid copper-core balls with a eutectic alloy Sn63/Pb37 (M.P. 183žC coating were the first type of solid core ball to be considered and evaluated because of the compatibility with existing assembly processes. The nominal diameter of the solid core was 250 µm with an intended 25 µm eutectic shell. High and low magnification scanning electron micrographs of the solder coated copper spheres are provided in Figure 2. Sphere uniformity is an important consideration. We felt that if the solder spheres were not perfectly round, it would be more difficult to develop a repeatable sphere placement process. In addition, we felt the sphere uniformity would be important for testing, socketing, and final assembly. A uniform technique for mass ball placement is a must for volume CSP device packaging. The ball attachment sequence of the process is as follows:- The flux-printed flex-tape is mounted to a vacuum holder.
- The array pattern fixture is lowered to the flex-tape.
- A sweeper plate floods solder balls into all the holes.
- Excess solder spheres are swept away.
The upper section was raised away from the flex-tape leaving the solder alloy spheres attached to the contact site by only flux. The following requirements were targeted for automated ball placement:
- Initial CSP process throughput of 2000 units per hour
- 3 sigma process yield for each step
- System must employ a universal tooling platform
By adapting a universal tooling interface, we projected that the user will be able to change from one product to another with minimum impact and expense.
Solder Ball Reflow Attachment Process Options
Three main reflow heating methods being used for high volume BGA production are infrared radiation, forced hot air convection, and thermal conduction. All of these methods are suitable to reflow the µBGA flex-tape strips while mounted on their carrier frames with the following observations:- Infrared Radiation: Normally, the radiant IR energy is absorbed by the materials of the device causing the device to heat up to reflow the solder. (Note: Because silicon is often exposed on the backside and is highly transmissive of IR, radiation it is not recommended for exposed silicon CSPs.)
- Forced Hot Air Convection: The air is heated and circulates in each zone. The heat is transferred to the device by the air, causing the device and solder balls to heat up to reflow the solder.
- Conduction: The device is moved across the surface of a progressive series of heated platens. The heat is transferred through surface contact, allowing the solder balls to heat up and reflow.
Summary of Reflow Furnace Evaluation:
In tests, the IR process produced the least satisfactory results, and a unique profile was required for each unit design because of the variation in product mass, energy transmission and reflectivity. Other problems were experienced due to temperature variation across the carrier strip and variation in oven loading. Both the forced air convection and the conduction systems provided more satisfactory results. Temperature was uniform across the strip and a single profile could be maintained for different product configurations. The silicon die is an excellent medium to spread and transfer heat; however, the reflow profile and time duration will differ a great deal between various heating methods (as compared in Figure 3a and 3b). The reflow cycle times are two and three minutes respectively.
Conduction systems may prove to be a preferred method for the reflow of CSP strips such as the µBGA. This is because of their small physical size and economy of operation. The chip-size µBGA, in a flex-frame carrier format, does not really require a large oven or wide belt for reflow. The conduction oven has a very small footprint and much lower power consumption than typical multiple-zone, forced hot-air convection ovens. Devices are reflow solder processed with the contact spheres facing up and the silicon die surface down. This allows the heat to transfer through the die to the polyimide tape solder pad and the solder ball contact area, allowing uniform solder reflow.
Figure 3a. Reflow profiles shown for the convection systems provided a peak temperature 192°C for 37 seconds.
Figure 3b. The reflow profile for the conduction systems provided a peak temperature of 192°C as well, however, the time above the 183°C is only 25 seconds for the conduction oven.
Defluxing and Cleaning
A solvent type RMA, no-clean flux is currently used for attaching the solder balls. The array strips (while loaded in their transfer magazines) are defluxed in a closed loop, automatic cleaning system using de-ionized water and dried in a nitrogen-gas environment.Solid Core Ball Contacts
An optional contact type for the µBGA unit is to combine solder attachment capability, as well as socket capability by adapting a solid copper ball coated with a high temperature solder. Solid core ball attach with high temperature solder paste allows for the device to be socketed while it remains compatible with conventional SMT solder paste reflow mounting processes.The benefits of solid core solder balls are not typically available from non-compliant chip-scale package types. Both solid core and standard collapsible solder ball can develop high stress points and balls may shear off during repeated temperature cycling when the rigid interposer type BGA structure is soldered to a standard rigid PC board. The solid core ball, however, can be used if the package structure is compliant, typical of the construction for µBGA packages. As noted earlier, the µBGA structure decouples the strain produced by the thermal expansion and induced by CTE mismatch between the silicon die, the solder coated copper ball, and the PC Board laminate.
Solder Ball Contact Selection
Eutectic solder spheres are widely used as the contact for ball grid arrays and they have proved to be both an economical and practical contact for chip-scale-device attachment. Ideally suited for surface mount assembly, the miniature contacts are attached to the device before electrical test. Attachment of the small diameter spheres (typically 300 µm) onto the package has proved to be somewhat of a challenge, however.Sphere contacts for chip-scale packaging are available from several sources throughout the world. The alloy selected for the contact must consider the specific application or use environment. The most common alloy adapted for contact spheres consists of a mixture of tin and lead although other alloy combinations may be suited to specific applications.
Table I describes several alloy compositions that can be considered. The wide range of rated liquidus temperatures provides the opportunity to select an alloy best suited to meeting specified criteria for a given application.
| Alloy | Temp. (°C) Liquidus | |
|---|---|---|
| 63Sn/37Pb | (Tin/Lead) | 183 |
| 62Sn/36Pb/2Ag | (Tin/Lead/Silver) | 179 |
| 62Sn/36Pb/2I | (Tin/Lead/Indium) | 179 |
| 95.5Sn/3.5Ag | (Tin/Silver) * | 221 |
| 95Sn/3.5Ag/1.5I | (Tin/Silver/Indium) * | 218 |
| 10Sn/88Pb/2Ag | (Tin/Lead/Silver) | 290 |
| 10Sn/90Pb | (Tin/Lead) | 302 |
| 5Sn/95Pb | (Tin/Lead) | 312 |
| Sn | (Tin)* | 325 |
| * These systems are lead free. | ||
Table I. Contact Sphere Alloy Options.The low mass of the tiny spheres, when processed in bulk, often adversely impacts the ball-to-package attachment process efficiency. When selecting a supplier for the spheres one must also consider solder ball tolerances, sphere uniformity and its impact on contact array coplanarity. In addition, various ball alloys options, attachment techniques must be developed and tested.
Conclusion
Electronic product manufacturers may look only for a smaller device outline. However, products requiring the size advantage of CSPs may have aggressive price constraints as well. A strong infrastructure and efficient, high-yield manufacturing processes are vital to controlling the manufactured cost of CSPs. When comparing device packages, a holistic approach should be taken. Beyond the cost of the CSP, one must consider the costs of assembly, underfill (required by many low-cost CSPs), test, the substrate, rework and repair, and the long term product reliability expectations. Many leading IC manufacturers have determined that the compliant µBGA package will provide a robust package structure solution for most environmental conditions.Magazine-to-magazine handling of the flex-tape carriers will be the primary methodology adapted for high volume, automated processing of the µBGA package.
Figure 4. CSPs with solder balls attached can be supplied in tray carriers, as above, or tape-and-reel for SMT assembly.
Although eutectic solder balls will continue to be a primary contact medium, high-temperature solders, using solid core balls, will permit a single contact method for both socketing and surface-mount attachment. Given the greater strength of solid core balls, transport of the CSP is somewhat less problematic and can be supplied to the SMT assembly process in either tray carriers, (Figure 4) or in tape-and-reel formats.
Although several manufacturers have developed variations of the chip-scale package utilizing a broad variety of packaging materials, the selection of one packaging concept over another may be influenced by the ability of the device to qualify for the specific product environment criteria.
This puts the end user at a potential risk of having low reliability devices inadvertently placed onto assemblies destined for high reliability applications. Compliant CSPs, with solid core balls that can be pre-tested or even socketed, are an attractive alternative.
ICs packaged in format that can provide the performance needed for high-end products, as well as the economy and reliability demanded for high-volume automated assembly, are likely to serve an expanding role in electronics system design.
Reference
- S. Greathouse, "Obstacles to High Leadcount Devices in Chip-Scale Packages," SMTA National Symposium for Emerging Packaging Technologies, November 1996.
- J. Lau, "Ball Grid Array Technology," McGraw-Hill, New York, NY.
- W. Engelmaier., "Designing for Surface Mount Solder Joint Reliability," Society of Manufacturing Engineers Publication, Dearborn, MI.
- V. Solberg., "Standards and Applications for CSP Devices," SEMICON West July 1997.
- J. Fjelstad, "Novel Approaches to Compliant, Area Array Chip Interconnection," SEMICON Europa, April 1998
Dr. Mahidhara is Tessera's Manager of Joining Technology. He earned a Ph. D. in materials science from the University of California. Contact him at 408.383.3664 or raom@tessera.com.
Mr. Solberg is Tessera's Director of Advanced Manufacturing Technology. He serves on several committees for surface mount design and standards and is the author of several books on SMT. Contact him at 408.383.3614 or vern@tessera.com.
Mr. Zohni is a Tessera Package Development Engineer. He earlier worked for LSI Logic in IC package development and holds a bachelor's degree in mechanical engineering from the Worcester Polytechnic Institute. Contact him at 408.952.4326 or waltz@tessera.com.
Mr. Fjelstad is a Tessera Fellow and a Senior Member of Technical Staff. Contact him at 408.383.3611 or joef@tessera.com.