Current Issue An Independent Journal Dedicated to the Advancement of Chip - Scale Electronics October 2001 Email the editor

By Joseph H. Johnson, Laurier Inc., Londonderry, N.H.

Until recently, the die sorting process-which has been part of the IC assembly landscape for many years-never achieved "star billing," although it is an essential step in many assembly operations.

Emerging IC package concepts and assembly technologies, such as CSPs and wafer-level packaging, are pushing this venerable, but sparsely employed process into the mainstream.

This article will discuss the process (let's continue to call it "die sorting" for now, even though emerging applications have less to do with bare die), its origins and growth. We will also examine the forces that are driving changes in die sorting equipment and processes, and how some leading equipment manufacturers are addressing these changes.

The process we call die sorting began in the 1960s. After a wafer was probed and the "bad" die were inked, early die sorting equipment (often manual or semiautomatic) was used to remove the non-inked ("good") die from the wafer. These die were then placed into appropriate carriers (usually matrix trays).

These devices were then either sold as "bare die" or used in subsequent in-house die attach operations. While most captive die attach machines picked die directly from the wafer, this option was not usually available in the merchant market for bare die, either because the users were not equipped to handle wafers or, more often, the wafer manufacturers were reluctant to reveal wafer yield and other items considered proprietary.

In-House Assembly

In the early 1980s, a few very large producers of memory ICs started to pre-sort most of the die destined for their in-house assembly operations.

Figure 1. Typical prober-generated wafer map shows locations of prime die and downgrades

The devices that met all the parametric requirements of the design (prime die) went directly to die attach tools. Downgrades, however, were either inventoried for later assembly or were sold into less demanding applications, with the thinking, "If it wiggles, there's a market for it."

Two technological advances were required to enable this wafer yield improving process:

• Wafer-Map Generation, where wafer probe equipment generated software files. These files mapped the tested wafers, recording such information as a die's location on the wafer and its corresponding grade or "bin" (Figure 1) and

• Wafer-Map Reading, where die sort pick-and-place tools could use the mapping information to guide the process. This information assured that only good die from a particular bin or sort category were picked and that the die from many wafers could be automatically sorted into as many as 12 separate carriers in a single pass (Figure 2).

Automatic Alignment

It is critical in this process to align the wafer automatically to the X and Y axes of the die sorting tool and correctly position the wafer so that the die sort tool "knows" the exact location of the die on the wafer at all times.

Additionally, 100% reliability was mandatory, since-in most cases-visual aids such as ink dots were no longer used.

Thus, with wafer mapping, the true value of die sorting could be realized. Mapping enabled downgrades to be segregated and inventoried until needed, without incurring the expense of assembly and test operations.

Additionally, die attach equipment became more efficient because only prime die were being processed.

Despite the benefits realized by some large IC producers, die sorting did not become a mainstream process step in most assembly and test operations. Regrettably, many of these assembly facilities, often located half a world away from the wafer fabs, were not concerned with improving wafer yields.

Figure 2. Automatic matrix tray stacking output. Each stack represents a separate sort category.	Figure 3. Die sorter used to build 100% yield wafers of downgrade devices

Assembly and Test Efficiencies

Similarly, the wafer fabs were not necessarily concerned with improving assembly and test efficiencies.

Several other factors also hampered the widespread use of die sorting in volume assembly and test operations. For example:

• Wafer maps were not widely used (well into the 1990s many Asian assembly and test operations still used only ink dots to differentiate good die from bad).

• Wafer yields improved to the point that harvesting downgrades did not appear to be cost effective. Some memory device makers, however, have indeed found it profitable to pick and sort downgrades after the prime die have been picked from the wafer at die attach.

  Although many of these downgrades are sorted into matrix trays (waffle packs), some operations place salvaged downgrades back onto wafer mounting tape (Figure 3), so the resulting 100% yield wafers can later be processed on the same die attach tools that bonded the prime die.

• There was also some concern about potential damage to unpackaged die in shipment and storage (although later studies have shown this concern to be largely unfounded).

The die sorting equipment market remained relatively small and highly fragmented, with two or three dominant competitors and a number of other players who became interested only when their sales of die attach equipment were soft.

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